[U-Boot] [PATCH 1/9] pinctrl: renesas: Fix r8a779{5, 6, 65} assign to GP7_03/02 of GPSR7
Marek Vasut
marek.vasut at gmail.com
Mon Mar 4 00:46:29 UTC 2019
From: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx at renesas.com>
This patch is change the bit assignment of "HDMI1_CEC" to "GP7_03",
and "HDMI0_CEC" to "GP7_02". This information was confirmed in the
R-Car Gen3 Hardware Manual Rev.1.50.
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx at renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas at gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
---
drivers/pinctrl/renesas/pfc-r8a7795.c | 55 ++++++++++++++-------------
drivers/pinctrl/renesas/pfc-r8a7796.c | 42 +++++++++++++-------
2 files changed, 58 insertions(+), 39 deletions(-)
diff --git a/drivers/pinctrl/renesas/pfc-r8a7795.c b/drivers/pinctrl/renesas/pfc-r8a7795.c
index a6ecc0cabe..7c0990c2c7 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7795.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7795.c
@@ -2,7 +2,7 @@
/*
* R8A7795 ES2.0+ processor support - PFC hardware block.
*
- * Copyright (C) 2015-2016 Renesas Electronics Corporation
+ * Copyright (C) 2015-2019 Renesas Electronics Corporation
*/
#include <common.h>
@@ -202,8 +202,8 @@
#define GPSR6_0 F_(SSI_SCK01239, IP14_23_20)
/* GPSR7 */
-#define GPSR7_3 FM(HDMI1_CEC)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_3 FM(GP7_03)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -588,8 +588,8 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS1),
PINMUX_SINGLE(AVS2),
PINMUX_SINGLE(CLKOUT),
- PINMUX_SINGLE(HDMI0_CEC),
- PINMUX_SINGLE(HDMI1_CEC),
+ PINMUX_SINGLE(GP7_02),
+ PINMUX_SINGLE(GP7_03),
PINMUX_SINGLE(I2C_SEL_0_1),
PINMUX_SINGLE(I2C_SEL_3_1),
PINMUX_SINGLE(I2C_SEL_5_1),
@@ -2126,20 +2126,23 @@ static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi0_cec_pins[] = {
- /* HDMI0_CEC */
+/* - GP7_02/03 -------------------------------------------------------------- */
+static const unsigned int gp7_02_pins[] = {
+ /* GP7_02 */
RCAR_GP_PIN(7, 2),
};
-static const unsigned int hdmi0_cec_mux[] = {
- HDMI0_CEC_MARK,
+
+static const unsigned int gp7_02_mux[] = {
+ GP7_02_MARK,
};
-static const unsigned int hdmi1_cec_pins[] = {
- /* HDMI1_CEC */
+
+static const unsigned int gp7_03_pins[] = {
+ /* GP7_03 */
RCAR_GP_PIN(7, 3),
};
-static const unsigned int hdmi1_cec_mux[] = {
- HDMI1_CEC_MARK,
+
+static const unsigned int gp7_03_mux[] = {
+ GP7_03_MARK,
};
/* - HSCIF0 ----------------------------------------------------------------- */
@@ -4230,8 +4233,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
- SH_PFC_PIN_GROUP(hdmi0_cec),
- SH_PFC_PIN_GROUP(hdmi1_cec),
+ SH_PFC_PIN_GROUP(gp7_02),
+ SH_PFC_PIN_GROUP(gp7_03),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -4613,12 +4616,12 @@ static const char * const du_groups[] = {
"du_disp",
};
-static const char * const hdmi0_groups[] = {
- "hdmi0_cec",
+static const char * const gp7_02_groups[] = {
+ "gp7_02",
};
-static const char * const hdmi1_groups[] = {
- "hdmi1_cec",
+static const char * const gp7_03_groups[] = {
+ "gp7_03",
};
static const char * const hscif0_groups[] = {
@@ -5027,8 +5030,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(du),
- SH_PFC_FUNCTION(hdmi0),
- SH_PFC_FUNCTION(hdmi1),
+ SH_PFC_FUNCTION(gp7_02),
+ SH_PFC_FUNCTION(gp7_03),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
@@ -5749,8 +5752,8 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
- { RCAR_GP_PIN(7, 3), 8, 3 }, /* HDMI1_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
+ { RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
} },
@@ -6004,8 +6007,8 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
- [29] = RCAR_GP_PIN(7, 3), /* HDMI1_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
+ [29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
} },
diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c
index f73f67dad6..47184753f7 100644
--- a/drivers/pinctrl/renesas/pfc-r8a7796.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7796.c
@@ -209,7 +209,7 @@
/* GPSR7 */
#define GPSR7_3 FM(GP7_03)
-#define GPSR7_2 FM(HDMI0_CEC)
+#define GPSR7_2 FM(GP7_02)
#define GPSR7_1 FM(AVS2)
#define GPSR7_0 FM(AVS1)
@@ -596,7 +596,7 @@ static const u16 pinmux_data[] = {
PINMUX_SINGLE(AVS2),
PINMUX_SINGLE(CLKOUT),
PINMUX_SINGLE(GP7_03),
- PINMUX_SINGLE(HDMI0_CEC),
+ PINMUX_SINGLE(GP7_02),
PINMUX_SINGLE(MSIOF0_RXD),
PINMUX_SINGLE(MSIOF0_SCK),
PINMUX_SINGLE(MSIOF0_TXD),
@@ -2133,13 +2133,23 @@ static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
-/* - HDMI ------------------------------------------------------------------- */
-static const unsigned int hdmi0_cec_pins[] = {
- /* HDMI0_CEC */
+/* - GP7_02/03 -------------------------------------------------------------- */
+static const unsigned int gp7_02_pins[] = {
+ /* GP7_02 */
RCAR_GP_PIN(7, 2),
};
-static const unsigned int hdmi0_cec_mux[] = {
- HDMI0_CEC_MARK,
+
+static const unsigned int gp7_02_mux[] = {
+ GP7_02_MARK,
+};
+
+static const unsigned int gp7_03_pins[] = {
+ /* GP7_03 */
+ RCAR_GP_PIN(7, 3),
+};
+
+static const unsigned int gp7_03_mux[] = {
+ GP7_03_MARK,
};
/* - HSCIF0 ----------------------------------------------------------------- */
@@ -4200,7 +4210,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
- SH_PFC_PIN_GROUP(hdmi0_cec),
+ SH_PFC_PIN_GROUP(gp7_02),
+ SH_PFC_PIN_GROUP(gp7_03),
SH_PFC_PIN_GROUP(hscif0_data),
SH_PFC_PIN_GROUP(hscif0_clk),
SH_PFC_PIN_GROUP(hscif0_ctrl),
@@ -4578,8 +4589,12 @@ static const char * const du_groups[] = {
"du_disp",
};
-static const char * const hdmi0_groups[] = {
- "hdmi0_cec",
+static const char * const gp7_02_groups[] = {
+ "gp7_02",
+};
+
+static const char * const gp7_03_groups[] = {
+ "gp7_03",
};
static const char * const hscif0_groups[] = {
@@ -4975,7 +4990,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(drif2),
SH_PFC_FUNCTION(drif3),
SH_PFC_FUNCTION(du),
- SH_PFC_FUNCTION(hdmi0),
+ SH_PFC_FUNCTION(gp7_02),
+ SH_PFC_FUNCTION(gp7_03),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(hscif2),
@@ -5692,7 +5708,7 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
{ RCAR_GP_PIN(0, 15), 24, 3 }, /* D15 */
{ RCAR_GP_PIN(7, 0), 20, 3 }, /* AVS1 */
{ RCAR_GP_PIN(7, 1), 16, 3 }, /* AVS2 */
- { RCAR_GP_PIN(7, 2), 12, 3 }, /* HDMI0_CEC */
+ { RCAR_GP_PIN(7, 2), 12, 3 }, /* GP7_02 */
{ RCAR_GP_PIN(7, 3), 8, 3 }, /* GP7_03 */
{ PIN_A_NUMBER('P', 7), 4, 2 }, /* DU_DOTCLKIN0 */
{ PIN_A_NUMBER('P', 8), 0, 2 }, /* DU_DOTCLKIN1 */
@@ -5946,7 +5962,7 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = {
[25] = RCAR_GP_PIN(0, 15), /* D15 */
[26] = RCAR_GP_PIN(7, 0), /* AVS1 */
[27] = RCAR_GP_PIN(7, 1), /* AVS2 */
- [28] = RCAR_GP_PIN(7, 2), /* HDMI0_CEC */
+ [28] = RCAR_GP_PIN(7, 2), /* GP7_02 */
[29] = RCAR_GP_PIN(7, 3), /* GP7_03 */
[30] = PIN_A_NUMBER('P', 7), /* DU_DOTCLKIN0 */
[31] = PIN_A_NUMBER('P', 8), /* DU_DOTCLKIN1 */
--
2.19.2
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