[U-Boot] [PATCH v2 0/9] SMP support for RISC-V

[Anup Patel]

> -----Original Message-----
> From: Andreas Schwab <schwab at suse.de>
> Sent: Wednesday, March 6, 2019 4:27 PM
> To: Anup Patel <Anup.Patel at wdc.com>
> Cc: Auer, Lukas <lukas.auer at aisec.fraunhofer.de>; u-boot at lists.denx.de;
> paul.walmsley at sifive.com; agraf at suse.de; anup at brainfault.org;
> baruch at tkos.co.il; daniel.schwierzeck at gmail.com; bmeng.cn at gmail.com;
> rick at andestech.com; sr at denx.de; palmer at sifive.com; Atish Patra
> <Atish.Patra at wdc.com>
> Subject: Re: [PATCH v2 0/9] SMP support for RISC-V
> 
> Apparently sometimes u-boot tries to boot the kernel on heart 0 (the E51
> core), which will then fail to start userspace, since that cannot cope with the
> missing fpu.

That's not possible because in this series we have "available_hart_mask"
to track HARTs that entered U-Boot.

Recently, Atish made some progress with OpenSBI warm-boot issues. I
will let him provide details about it.

Regards,
Anup