[U-Boot] [PULL] u-boot-socfpga/master

[Marek Vasut]

Arria10 DRAM fixes and Gen5 cache fixes.

The following changes since commit e8e3f2d2d48f97b2c79b698eccedce8f4f880993:

  Merge branch '2019-03-08-master-imports' (2019-03-08 18:04:13 -0500)

are available in the Git repository at:

  git://git.denx.de/u-boot-socfpga.git master

for you to fetch changes up to 88c3bb49e1bf2b808cbad1fbdeda09480ae580a7:

  ddr: socfpga: Clean up ddr_setup() (2019-03-09 23:25:19 +0100)

----------------------------------------------------------------
Dinh Nguyen (1):
      ARM: socfpga: fix data and tag latency values for pl310 cache
controller

Marek Vasut (9):
      ddr: socfpga: Fix IO in Arria10 DDR driver
      ddr: socfpga: Fix newline in debug print on A10
      ARM: socfpga: Disable D cache in SPL
      ARM: socfpga: Drop CONFIG_SYS_NAND_BAD_BLOCK_POS
      ARM: socfpga: Fix Arria10 SPI and NAND U-Boot offset
      ARM: socfpga: Fix A10 SoCDK Kconfig
      ddr: socfpga: Fix EMIF clear timeout
      ddr: socfpga: Clean up EMIF reset
      ddr: socfpga: Clean up ddr_setup()

 arch/arm/mach-socfpga/misc.c            |   4 ++--
 arch/arm/mach-socfpga/spl_a10.c         |   2 ++
 board/altera/arria10-socdk/Kconfig      |   2 +-
 drivers/ddr/altera/sdram_arria10.c      | 107
++++++++++++++++++++++++++++++++++++-----------------------------------------------------------------------
 include/configs/socfpga_arria10_socdk.h |   2 --
 include/configs/socfpga_common.h        |   9 ++++++++-
 6 files changed, 49 insertions(+), 77 deletions(-)