[U-Boot] rk3399 sdram data training read gate is looping forever

[Jagan Teki]

On Tue, Jan 8, 2019 at 6:08 AM Simon Glass <sjg at chromium.org> wrote:
>
> Hi Jagan,
>
> On Sat, 5 Jan 2019 at 12:58, Jagan Teki <jagan at amarulasolutions.com> wrote:
> >
> > Hi,
> >
> > I'm trying to bring-up rk3399 SBC with 1GB DDR3 933MHZ capable, and
> > observed an sdram_init issue where data_training_rg transfer is
> > looping forever. The denali_pi[80], and denali_pi[74] seems to be
> > proper values while setting up the particular ranks.
> >
> > Can anyone encounter similar issue? let me know for any inputs.
> >
> > Log:
>
> I have not seen this so far.

In fact I have reused existing rk3399-sdram-ddr3-1866.dtsi (which
seems to be 2GB) since this SBC using similar frequency. The only
difference between other supported sdram dtsi's from Mainline would be
that it is single channel and 1GB size.

For single channel I have updated the num_channel as
index c46c1996be..85e99d81c2 100644
--- a/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
+++ b/arch/arm/dts/rk3399-sdram-ddr3-1866.dtsi
@@ -37,7 +37,7 @@
                0x00000000
                933
                3
-               2
+               1
                9
                1
                0x00000600

But not clear for any changes wrt to 1GB vs 2GB? Any help where to
debug please let me know.