[U-Boot] [PATCH 2/2] pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS

[Thierry Reding]

From: Thierry Reding <treding at nvidia.com>

If a platform defines CONFIG_NR_DRAM_BANKS, each DRAM bank will be added
as a PCI region. The number of MAX_PCI_REGIONS therefore needs to scale
with the number of DRAM banks, otherwise we will end up with too little
space in the hose->regions array to store all system memory regions.

Signed-off-by: Thierry Reding <treding at nvidia.com>
---
 include/pci.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/pci.h b/include/pci.h
index 936cfe975cbe..82ef2dbc6640 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -534,7 +534,11 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
 extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
 				      struct pci_config_table *);
 
-#define MAX_PCI_REGIONS		7
+#ifdef CONFIG_NR_DRAM_BANKS
+#define MAX_PCI_REGIONS (CONFIG_NR_DRAM_BANKS + 7)
+#else
+#define MAX_PCI_REGIONS 7
+#endif
 
 #define INDIRECT_TYPE_NO_PCIE_LINK	1
 
-- 
2.20.1