[U-Boot] [PATCH 1/2] mv_ddr: ddr3: fix tRAS timimg parameter

[Stefan Roese]

On 28.02.19 22:11, Chris Packham wrote:
> From: Chris Packham <chris.packham at alliedtelesis.co.nz>
> 
> Based on the JEDEC standard JESD79-3F. The tRAS timings should include
> the highest speed bins at a given frequency. This is similar to commit
> 683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong
> comparison was used in the initial implementation.
> 
> Signed-off-by: Chris Packham <chris.packham at alliedtelesis.co.nz>
> 
> [https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15]
> Signed-off-by: Chris Packham <judge.packham at gmail.com>

Applied to u-boot-marvell/master.

Thanks,
Stefan