[U-Boot] [PATCH v2 6/6] arm: socfpga: a10: move SPL stack size to Kconfig

[Simon Goldschmidt]

Chee, Tien Fong <tien.fong.chee at intel.com> schrieb am Mi., 20. März 2019,
05:15:

> On Tue, 2019-03-19 at 17:29 +0100, Simon Goldschmidt wrote:
> > Am 19.03.2019 um 17:19 schrieb Chee, Tien Fong:
> > >
> > > On Fri, 2019-03-15 at 21:13 +0100, Simon Goldschmidt wrote:
> > > >
> > > > Instead of fixing the SPL stack to 64 KiB in the board config
> > > > header
> > > > via
> > > > CONFIG_SYS_SPL_MALLOC_SIZE, let's just use
> > > > CONFIG_SPL_SYS_MALLOC_F_LEN
> > > > in the defconfig.
> > > >
> > > > This also has the advandage that it removes sub-mach specific
> > > > ifdefs
> > > > in
> > > > socfpga_common.h.
> > > >
> > > > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com
> > > > >
> > > > ---
> > > Hi Simon,
> > >
> > > I found the culprit in patch[5], you cannot put mem_malloc_init in
> > > spl_common_init function because spl_common_init would be called in
> > > board_init_f, then board_init_f would call mem_malloc_init,
> > > mem_malloc_init would store start and end addresses to few global
> > > variables such as mem_malloc_start, mem_malloc_end and
> > > mem_malloc_brk.
> > > By that time, global variables are unavailable yet.
> > Thanks for testing. Patch 2/6 should make sure global variables are
> > available in board_init_f by clearing bss *before* calling that
> > function, not *after* calling it. Because technicaly, global
> > variables
> > are always available for a10-SPL as they are located in SRAM. They
> > only
> > got cleared after board_init_f...
> Yes, you are right, memset would clear .BSS after mem_malloc_init.
> >
> > Which gets me to my error: I forgot to enable the newly added
> > CONFIG_SPL_CLEAR_BSS_F in this patch. Could you probably try again
> > with
> > CONFIG_SPL_CLEAR_BSS_F enabled? That would be great!
> Tested, passing. May be force enabling it or compile error if full
> malloc is used?
>

Ok, thanks for testing again! I'll make up some kind of check for v3.

Regards,
Simon


> Thanks.
> TF.
> >
> > Regards,
> > Simon
> >
> > >
> > >
> > > Thanks.
> > > TF
> > >
> > > >
> > > >
> > > > Changes in v2: None
> > > >
> > > >   configs/socfpga_arria10_defconfig |  1 +
> > > >   include/configs/socfpga_common.h  | 14 --------------
> > > >   2 files changed, 1 insertion(+), 14 deletions(-)
> > > >
> > > > diff --git a/configs/socfpga_arria10_defconfig
> > > > b/configs/socfpga_arria10_defconfig
> > > > index f321a0ac3b..8d0479cc05 100644
> > > > --- a/configs/socfpga_arria10_defconfig
> > > > +++ b/configs/socfpga_arria10_defconfig
> > > > @@ -2,6 +2,7 @@ CONFIG_ARM=y
> > > >   CONFIG_ARCH_SOCFPGA=y
> > > >   CONFIG_SYS_TEXT_BASE=0x01000040
> > > >   CONFIG_SYS_MALLOC_F_LEN=0x2000
> > > > +CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000
> > > >   CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
> > > >   CONFIG_SPL=y
> > > >   CONFIG_IDENT_STRING="socfpga_arria10"
> > > > diff --git a/include/configs/socfpga_common.h
> > > > b/include/configs/socfpga_common.h
> > > > index 181af9b646..16c83900c3 100644
> > > > --- a/include/configs/socfpga_common.h
> > > > +++ b/include/configs/socfpga_common.h
> > > > @@ -251,16 +251,6 @@ unsigned int
> > > > cm_get_qspi_controller_clk_hz(void);
> > > >   #define CONFIG_SPL_TEXT_BASE            CONFIG_SYS_INIT_RAM
> > > > _ADDR
> > > >   #define CONFIG_SPL_MAX_SIZE             CONFIG_SYS_INIT_RAM_
> > > > SIZE
> > > >
> > > > -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > -/* SPL memory allocation configuration, this is for FAT
> > > > implementation */
> > > > -#ifndef CONFIG_SYS_SPL_MALLOC_START
> > > > -#define CONFIG_SYS_SPL_MALLOC_SIZE       0x00010000
> > > > -#define CONFIG_SYS_SPL_MALLOC_START      (CONFIG_SYS_INIT_RAM_
> > > > SIZE
> > > > - \
> > > > -                                  CONFIG_SYS_SPL_MALLOC_S
> > > > IZE
> > > > + \
> > > > -                                  CONFIG_SYS_INIT_RAM_ADD
> > > > R)
> > > > -#endif
> > > > -#endif
> > > > -
> > > >   /* SPL SDMMC boot support */
> > > >   #ifdef CONFIG_SPL_MMC_SUPPORT
> > > >   #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
> > > > @@ -294,11 +284,7 @@ unsigned int
> > > > cm_get_qspi_controller_clk_hz(void);
> > > >   /*
> > > >    * Stack setup
> > > >    */
> > > > -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > > >   #define CONFIG_SPL_STACK                CONFIG_SYS_INIT_SP_ADDR
> > > > -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > > > -#define CONFIG_SPL_STACK         CONFIG_SYS_SPL_MALLOC_ST
> > > > ART
> > > > -#endif
> > > >
> > > >   /* Extra Environment */
> > > >   #ifndef CONFIG_SPL_BUILD