[U-Boot] [PATCH v2 00/15] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
Peter Robinson
pbrobinson at gmail.com
Wed Mar 20 11:22:44 UTC 2019
Hi Thierry,
> This set of patches move some code from the Tegra186 SoC specific
> directory to a common location so that it can be more easily shared.
> Since the differences between Tegra186 and earlier generations are
> now very small, the builds are unified to avoid duplication of code.
>
> We also add support for accessing the PMC on systems where it can only
> be accessed from TrustZone.
>
> Finally, all of this is used to implement support for the recently
> announced NVIDIA Jetson Nano Developer Kit.
>
> These patches, along with patches to enable network booting[0], can also
> be found in the p3450 branch of the following repository:
>
> https://github.com/thierryreding/u-boot
I've tested this on both the Jetson TX1 and TX2 and I've very pleased
to see this series. Overall it works fine with the 28.x SDK I've
tested with in the past. I have one problem, which I also saw with my
previous hacked up version of the NV patches I had to boot the TX1
with cboot, when booting with UEFI I get the early boot crash below
(earlyprintk cmd line args need) but if I put a line in the grub.cfg
for grub to load the devicetree it boots fine. I suspect, but aren't
entirely sure, that the fdt_addr_r is getting stomped on somewhere, or
is inaccessible, when booted with UEFI where it's fine with extlinux
booting.
Peter
EFI stub: Booting Linux Kernel...
EFI stub: EFI_RNG_PROTOCOL unavailable, no randomness supplied
EFI stub: Using DTB from configuration table
EFI stub: Exiting boot services and installing virtual address map...
[ 0.000000] Booting Linux on physical CPU 0x0000000100 [0x411fd073]
[ 0.000000] Linux version 5.1.0-0.rc1.git0.1.fc29.aarch64
(perobins at morpheus.roving-it.com) (gcc version 8.1.1 20180626 (Red Hat
Cross 8.1.1-3) (GCC)) #1 SMP Tue Mar 19 16:05:25 GMT 2019
[ 0.000000] Machine model: NVIDIA P2771-0000-500
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: EFI v2.70 by Das U-Boot
[ 0.000000] efi: SMBIOS=0xefffb000 MEMRESERVE=0xd0915040
[ 0.000000] cma: Reserved 64 MiB at 0x00000000fc000000
[ 0.000000] earlycon: uart0 at MMIO 0x0000000003100000 (options '')
[ 0.000000] printk: bootconsole [uart0] enabled
[ 0.000000] NUMA: No NUMA configuration found
[ 0.000000] NUMA: Faking a node at [mem
0x0000000080000000-0x00000002767fffff]
[ 0.000000] NUMA: NODE_DATA [mem 0x2751f1780-0x2751fefff]
[ 0.000000] Zone ranges:
[ 0.000000] DMA32 [mem 0x0000000080000000-0x00000000ffffffff]
[ 0.000000] Normal [mem 0x0000000100000000-0x00000002767fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000080000000-0x0000000087efafff]
[ 0.000000] node 0: [mem 0x0000000087efb000-0x0000000087f04fff]
[ 0.000000] node 0: [mem 0x0000000087f05000-0x00000000efff7fff]
[ 0.000000] node 0: [mem 0x00000000efff8000-0x00000000efffffff]
[ 0.000000] node 0: [mem 0x00000000f0200000-0x0000000275ffffff]
[ 0.000000] node 0: [mem 0x0000000276600000-0x00000002767fffff]
[ 0.000000] Zeroed struct page in unavailable ranges: 18 pages
[ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x00000002767fffff]
[ 0.000000] On node 0 totalpages: 2056192
[ 0.000000] DMA32 zone: 8192 pages used for memmap
[ 0.000000] DMA32 zone: 0 pages reserved
[ 0.000000] DMA32 zone: 523776 pages, LIFO batch:63
[ 0.000000] Normal zone: 23968 pages used for memmap
[ 0.000000] Normal zone: 1532416 pages, LIFO batch:63
[ 0.000000] Failed to find device node for boot cpu
[ 0.000000] missing boot CPU MPIDR, not enabling secondaries
[ 0.000000] percpu: Embedded 23 pages/cpu @(____ptrval____) s55064
r8192 d30952 u94208
[ 0.000000] pcpu-alloc: s55064 r8192 d30952 u94208 alloc=23*4096
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Detected PIPT I-cache on CPU0
[ 0.000000] CPU features: detected: EL2 vector hardening
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024032
[ 0.000000] Policy zone: Normal
[ 0.000000] Kernel command line:
BOOT_IMAGE=(hd0,msdos2)/vmlinuz-5.1.0-0.rc1.git0.1.fc29.aarch64
root=UUID=fe563825-bdab-461d-9cbf-e340a971fa61 ro console=ttyS0,115200
earlycon uefi_debug earlyprintk=serial,ttyS0,115200 debug
[ 0.000000] software IO TLB: mapped [mem 0xf7fff000-0xfbfff000] (64MB)
[ 0.000000] Memory: 7889768K/8224768K available (11068K kernel
code, 2032K rwdata, 4808K rodata, 5952K init, 935K bss, 269464K
reserved, 65536K cma-reserved)
[ 0.000000] random: get_random_u64 called from
kmem_cache_open+0x3c/0x4c0 with crng_init=0
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] ftrace: allocating 40204 entries in 158 pages
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu:RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=1.
[ 0.000000] Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay
is 10 jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] timer_probe: no matching timers found
[ 0.000000] Kernel panic - not syncing: Unable to initialise
architected timer.
[ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted
5.1.0-0.rc1.git0.1.fc29.aarch64 #1
[ 0.000000] Hardware name: NVIDIA P2771-0000-500 (DT)
[ 0.000000] Call trace:
[ 0.000000] dump_backtrace+0x0/0x128
[ 0.000000] show_stack+0x24/0x30
[ 0.000000] dump_stack+0xa8/0xcc
[ 0.000000] panic+0x12c/0x2dc
[ 0.000000] time_init+0x34/0x4c
[ 0.000000] start_kernel+0x354/0x4c0
[ 0.000000] ---[ end Kernel panic - not syncing: Unable to
initialise architected timer. ]---
> Thanks,
> Thierry
>
> [0]: http://patchwork.ozlabs.org/project/uboot/list/?series=96153
>
> Thierry Reding (15):
> ARM: tegra: Use common header for PMU declarations
> ARM: tegra: Guard clock code with a Kconfig symbol
> ARM: tegra: Guard GP pad control code with a Kconfig symbol
> ARM: tegra: Guard memory controller code with a Kconfig symbol
> ARM: tegra: Guard pin controller code with a Kconfig symbol
> ARM: tegra: Guard powergate code with a Kconfig symbol
> ARM: tegra: Fix save_boot_params() prototype
> ARM: tegra: Allow boards to override boot target devices
> ARM: tegra: Support TZ-only access to PMC
> ARM: tegra: Workaround UDC boot issues only if necessary
> ARM: tegra: Restore DRAM bank count
> ARM: tegra: Unify Tegra186 builds
> ARM: tegra: Implement cboot_save_boot_params() in C
> ARM: tegra: Implement cboot_get_ethaddr()
> ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
>
> arch/arm/dts/tegra210-p3450-0000.dts | 130 ++++++++
> arch/arm/include/asm/arch-tegra/cboot.h | 45 +++
> arch/arm/include/asm/arch-tegra/pmc.h | 20 +-
> .../asm/{arch-tegra20 => arch-tegra}/pmu.h | 6 +-
> arch/arm/include/asm/arch-tegra/tegra.h | 6 +
> arch/arm/include/asm/arch-tegra114/pmu.h | 12 -
> arch/arm/include/asm/arch-tegra124/pmu.h | 13 -
> arch/arm/include/asm/arch-tegra210/pmu.h | 13 -
> arch/arm/include/asm/arch-tegra30/pmu.h | 12 -
> arch/arm/mach-tegra/Kconfig | 31 ++
> arch/arm/mach-tegra/Makefile | 16 +-
> arch/arm/mach-tegra/board.c | 41 ++-
> arch/arm/mach-tegra/board186.c | 32 --
> arch/arm/mach-tegra/board2.c | 37 ++-
> arch/arm/mach-tegra/cache.c | 2 +
> .../{tegra186/nvtboot_board.c => cboot.c} | 280 ++++++++++++++++--
> arch/arm/mach-tegra/clock.c | 13 +-
> arch/arm/mach-tegra/cmd_enterrcm.c | 6 +-
> arch/arm/mach-tegra/cpu.c | 20 +-
> arch/arm/mach-tegra/emc.c | 2 +-
> arch/arm/mach-tegra/lowlevel_init.S | 39 ---
> arch/arm/mach-tegra/pmc.c | 92 ++++++
> arch/arm/mach-tegra/powergate.c | 11 +-
> arch/arm/mach-tegra/tegra186/Makefile | 4 -
> arch/arm/mach-tegra/tegra186/nvtboot_ll.S | 20 --
> arch/arm/mach-tegra/tegra186/nvtboot_mem.c | 172 -----------
> arch/arm/mach-tegra/tegra210/Kconfig | 7 +
> board/nvidia/p2771-0000/p2771-0000.c | 10 +-
> board/nvidia/p3450-0000/Kconfig | 12 +
> board/nvidia/p3450-0000/MAINTAINERS | 6 +
> board/nvidia/p3450-0000/Makefile | 8 +
> board/nvidia/p3450-0000/p3450-0000.c | 143 +++++++++
> .../p3450-0000/pinmux-config-p3450-0000.h | 257 ++++++++++++++++
> configs/p2771-0000-000_defconfig | 2 +-
> configs/p2771-0000-500_defconfig | 2 +-
> configs/p3450-0000_defconfig | 54 ++++
> include/configs/p3450-0000.h | 44 +++
> include/configs/tegra-common-post.h | 2 +
> 38 files changed, 1230 insertions(+), 392 deletions(-)
> create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts
> create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h
> rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%)
> delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h
> delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h
> delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h
> delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h
> delete mode 100644 arch/arm/mach-tegra/board186.c
> rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (50%)
> delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S
> create mode 100644 arch/arm/mach-tegra/pmc.c
> delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_ll.S
> delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c
> create mode 100644 board/nvidia/p3450-0000/Kconfig
> create mode 100644 board/nvidia/p3450-0000/MAINTAINERS
> create mode 100644 board/nvidia/p3450-0000/Makefile
> create mode 100644 board/nvidia/p3450-0000/p3450-0000.c
> create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
> create mode 100644 configs/p3450-0000_defconfig
> create mode 100644 include/configs/p3450-0000.h
>
> --
> 2.21.0
>
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