[U-Boot] [PATCH 8/9] riscv: dts: ae350 support SMP.

Bin Meng bmeng.cn at gmail.com
Thu Mar 21 09:15:33 UTC 2019


Hi Rick,

On Thu, Mar 21, 2019 at 4:51 PM Rick Chen <rickchen36 at gmail.com> wrote:
>
> Hi Bin
>
> Bin Meng <bmeng.cn at gmail.com> 於 2019年3月20日 週三 下午3:22寫道:
> >
> > Hi Rick,
> >
> > On Tue, Mar 19, 2019 at 5:13 PM Andes <uboot at andestech.com> wrote:
> > >
> > > From: Rick Chen <rick at andestech.com>
> > >
> >
> > nits: remove the ending period in the commit title.
>
> OK.
> I will remove it.
>
> >
> > > Signed-off-by: Rick Chen <rick at andestech.com>
> > > Cc: Greentime Hu <greentime at andestech.com>
> > > ---
> > >  arch/riscv/dts/ae350_32.dts | 81 +++++++++++++++++++++++++++++++++------------
> > >  arch/riscv/dts/ae350_64.dts | 47 +++++++++++++++++++++++---
> > >  2 files changed, 101 insertions(+), 27 deletions(-)
> > >
> > > diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts
> > > index 0679827..0b4d966 100644
> > > --- a/arch/riscv/dts/ae350_32.dts
> > > +++ b/arch/riscv/dts/ae350_32.dts
> > > @@ -25,17 +25,50 @@
> > >                         reg = <0>;
> > >                         status = "okay";
> > >                         compatible = "riscv";
> > > -                       riscv,isa = "rv32imafdc";
> > > +                       riscv,isa = "rv32i2p0m2p0a2p0f2p0d2p0c2p0xv5-0p0";
> >
> > I am not sure what is this. Is this something approved?
>
> It is about elf checking (attribute) and seem has been upstream to GCC.
> https://patchwork.ozlabs.org/cover/1040998/
>

So that patch affects GCC's "-march" string? But why do we need adjust
the "riscv,isa" string in DT?

Regards,
Bin


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