[U-Boot] [PATCH v3 00/11] SMP support for RISC-V

[Padmarao Begari]

I think, the boot flow explained above is supported the sifive fu540 board
default boot mode.
if we want to select debug mode, then, does this patches work with the
u-boot to TFTP booting(dhcp, bootp) in debug mode?

Regards
Padmarao

On Fri, Mar 22, 2019 at 4:47 AM Atish Patra <atish.patra at wdc.com> wrote:

> On 3/21/19 4:06 PM, Bin Meng wrote:
> > On Thu, Mar 21, 2019 at 11:39 PM Troy Benjegerdes <hozer at hozed.org>
> wrote:
> >>
> >> On Sun, Mar 17, 2019 at 07:28:31PM +0100, Lukas Auer wrote:
> >>> This patch series adds SMP support for RISC-V to U-Boot. It allows
> >>> U-Boot to run on multi-hart systems (hart is the RISC-V terminology for
> >>> hardware thread). Images passed to bootm will be started on all harts.
> >>> The bootm command is currently the only one that will boot images on
> all
> >>> harts, bootefi is not yet supported.
> >>>
> >>> The patches have been successfully tested on both QEMU (machine and
> >>> supervisor mode) and the HiFive Unleashed board (supervisor mode),
> using
> >>> BBL and OpenSBI.
> >>
> >> Can you describe the test configuration and boot flow a little more, or
> post an
> >> SDcard image that boots with the switches as shown in the readme at [1]
> >>
> >> I don't see any board-specific memory initialization code anywhere, so
> I assume
> >> you are still using the original SiFive FSBL, and not the u-boot
> version that
> >> includes the memory init code [2]
> >>
> >
> > Correct. Mainline U-Boot on the FU540 board runs on S-mode currently.
> > You can refer to documentation doc/README.sifive-fu540
> >
>
> To add Bin's comment, the boot flow described in README.sifive-fu540 is
>
> ZSBL->FSBL->OpenSBI/BBL->U-Boot(S Mode)->Linux
>
> FYI: For BBL, you need to hack U-Boot to add serial console in DT.
>
> IMHO, we should avoid forks and use upstream code as much as possible.
>
> The memory initialization patches in [2] were never upstreamed. It would
> be great if that can upstream them so that we can replace FSBL as well.
> U-Boot SPL support for RISC-V would even be better.
>
> Regards,
> Atish
> >> [1] https://github.com/sifive/freedom-u-sdk
> >> [2] https://github.com/sifive/HiFive_U-Boot
> >>
> >
> > Regards,
> > Bin
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> >
>
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