[U-Boot] [PATCH 05/36] rockchip: add STIMER_BASE for all SoCs

[Kever Yang]

Hi U-Boot Maintainers:

I would like to close this topic and update all related source code, you
can find the previous discussion at [0][1].
Philipp object this patch and his original reason is:

> This should not be in Kconfig and rather in a header-file.
> With what you do here, a user (e.g. via 'make menuconfig') or a defconfig
> file (e.g. due to a typo) could accidentially change overwrite this.

and Philipp also think:
 > asm/arch-rockchip would be preferable over include/config as a header

There are many ways for feature  configure on rockchip platform now:
- board dts;
- header file in include/config
- Kconfig in $(BOARD)_defconfig
- Kconfig default value in 'Kconfig' file
Already too many place to config, we should make it simple rather than
complex.

I think people are migrating more and more configurations from header file
to Kconfig, including:
- option for enable/disable modules;
- option for module parameter which is numerical value;
- option for module parameter which is string;
I think the target is that most of the configs goes to Kconfig and user can
config options with menuconfig
and no need to touch header file(Please tell me if this is not true).

And for all those config options, I think at lease can be separate into two
kind:
- options per-board;
- options per-soc (some of them may per-vendor);
I think the idealized model would be per-soc options goes to 'Kconfig' file
with default value combine with SOC,
and per-board options at $(BOARD)_defconfig.

ROCKCHIP_STIMER_REG(another case is BOOT_MODE_REG) is per-soc config
option, just like SYS_TEXT_BASE,
TPL_TEXT_BASE,  TPL_MAX_SIZE, SYS_SOC and so on. Driver for different SOCs
to use this reg are just the same,
and this reg needs to be used very early in TPL/SPL which means no DM, no
dts available.

Here are the solutions from previous discussion:
- dts (by Simon)
    extra dtb code needed, setting separate into individual board dts;
    not available and not suggestion to use in TPL/SPL;
- move to header in 'asm/arch-rockchip' (by Philipp)
    one more place to config, make config options more complicate;
    may separate in more than 10+ files for different soc/board;
- RMII setting like, (by Philipp)
    reference to 'drivers/net/gmac_rockchip.c', driver for different SoCs
are not re-usable, driver needs to update for each new SoC support;
    not available with DM in early TPL/SPL;
- Kconfig with default value in this patch
    Keep driver clean and no need to update with new SoC;
    One place rather than 10+ individual files, same usage like
SYS_TEXT_BASE, reference to:
      341c058654 sunxi: move CONFIG_SYS_TEXT_BASE out of defconfigs

I think the default value in Kconfig is the best solution, the SPL/TPL
should be small, fast and with enough functionality for use.

Thanks,
- Kever
[0] https://patchwork.ozlabs.org/patch/1004148/
[1] http://patchwork.ozlabs.org/patch/891462/

Kever Yang <kever.yang at rock-chips.com> 于2018年3月27日周二 下午5:30写道：

> STIMER is can only access in secure mode if the SoCs supports trust,
> and it locate in alive power domain, as the source of ARM arch/generic
> timer, we add a base addr for all SoCs so that we can init with a common
> function.
>
> Signed-off-by: Kever Yang <kever.yang at rock-chips.com>
> ---
>
>  arch/arm/mach-rockchip/Kconfig | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/mach-rockchip/Kconfig
> b/arch/arm/mach-rockchip/Kconfig
> index 007cb22..5dfe452 100644
> --- a/arch/arm/mach-rockchip/Kconfig
> +++ b/arch/arm/mach-rockchip/Kconfig
> @@ -190,6 +190,25 @@ config ROCKCHIP_BOOT_MODE_REG
>           The Soc will enter to different boot mode(defined in
> asm/arch/boot_mode.h)
>           according to the value from this register.
>
> +config ROCKCHIP_STIMER_BASE
> +       hex "Rockchip Secure timer base address"
> +       default 0xff220020 if ROCKCHIP_PX30
> +       default 0x200440a0 if ROCKCHIP_RK3036
> +       default 0x2000e000 if ROCKCHIP_RK3066
> +       default 0x20018020 if ROCKCHIP_RK3126
> +       default 0x200440a0 if ROCKCHIP_RK3128
> +       default 0x2000e000 if ROCKCHIP_RK3188
> +       default 0x110d0020 if ROCKCHIP_RK322X
> +       default 0xff810020 if ROCKCHIP_RK3288
> +       default 0xff1d0020 if ROCKCHIP_RK3328
> +       default 0xff830020 if ROCKCHIP_RK3368
> +       default 0xff8680a0 if ROCKCHIP_RK3399
> +       default 0x10350020 if ROCKCHIP_RV1108
> +       default 0
> +       help
> +         The secure timer inited in SPL/TPL in secure word, ARM generic
> timer
> +         works after this timer work.
> +
>  config ROCKCHIP_SPL_RESERVE_IRAM
>         hex "Size of IRAM reserved in SPL"
>         default 0
> --
> 1.9.1
>
>