[U-Boot] [PATCH v3 2/4] rtc: m41t62: add compatible for m41t82

[Simon Goldschmidt]

This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (asit was usable for this model in
non-DM mode before).

In addition, the HT bit has to be reset during probe, since the m41t82
chip sets it when entering battery standby mode.

This patch ensures this driver works on socfpga_socrates.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
Reviewed-by: Stefan Roese <sr at denx.de>
---

Changes in v3:
- pick up missing reviewed-by from v1

Changes in v2:
- m41t82: reset HT bit during probe

 drivers/rtc/m41t62.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c
index 2ee7e00b02..6161b76712 100644
--- a/drivers/rtc/m41t62.c
+++ b/drivers/rtc/m41t62.c
@@ -155,6 +155,15 @@ static int m41t62_rtc_reset(struct udevice *dev)
 	return ret;
 }
 
+/*
+ * Make sure HT bit is cleared. This bit is set on entering battery backup
+ * mode, so do this before the first read access.
+ */
+static int m41t62_rtc_probe(struct udevice *dev)
+{
+	return m41t62_rtc_reset(dev);
+}
+
 static const struct rtc_ops m41t62_rtc_ops = {
 	.get = m41t62_rtc_get,
 	.set = m41t62_rtc_set,
@@ -163,6 +172,7 @@ static const struct rtc_ops m41t62_rtc_ops = {
 
 static const struct udevice_id m41t62_rtc_ids[] = {
 	{ .compatible = "st,m41t62" },
+	{ .compatible = "st,m41t82" },
 	{ .compatible = "microcrystal,rv4162" },
 	{ }
 };
@@ -172,6 +182,7 @@ U_BOOT_DRIVER(rtc_m41t62) = {
 	.id	= UCLASS_RTC,
 	.of_match = m41t62_rtc_ids,
 	.ops	= &m41t62_rtc_ops,
+	.probe  = &m41t62_rtc_probe,
 };
 
 #else /* NON DM RTC code - will be removed */
-- 
2.19.1