[U-Boot] [PATCH v3 2/4] sysreset: socfpga: gen5: add sysreset driver

[Simon Goldschmidt]

On 09.05.19 20:08, Simon Goldschmidt wrote:
> This adds a UCLASS_SYSRESET sysreset driver for socfgpa gen5.
> 
> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> ---
> 
> Changes in v3:
> - moved socfpga gen5 sysreset driver to extra patch
> 
> Changes in v2: None
> 
>   drivers/sysreset/Kconfig            |  7 ++++
>   drivers/sysreset/Makefile           |  1 +
>   drivers/sysreset/sysreset_socfpga.c | 56 +++++++++++++++++++++++++++++
>   3 files changed, 64 insertions(+)
>   create mode 100644 drivers/sysreset/sysreset_socfpga.c

I just noticed patman complained about new files regarding MAINTAINERS.
Should these new drivers be listed in the MAINTAINERS file under the 
socfpga section? I noticed other platforms seem to do that but we don't. 
How is this handled?

Regards,
Simon

> 
> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> index 8ce3e2e207..066838c106 100644
> --- a/drivers/sysreset/Kconfig
> +++ b/drivers/sysreset/Kconfig
> @@ -36,6 +36,13 @@ config SYSRESET_PSCI
>   	  Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
>   	  must be running on your system.
>   
> +config SYSRESET_SOCFPGA
> +	bool "Enable support for Intel SOCFPGA family"
> +	depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10)
> +	help
> +	  This enables the system reset driver support for Intel SOCFPGA SoCs
> +	  (Cyclone 5, Arria 5 and Arria 10).
> +
>   config SYSRESET_TI_SCI
>   	bool "TI System Control Interface (TI SCI) system reset driver"
>   	depends on TI_SCI_PROTOCOL
> diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> index b3728ac17f..0241b0132d 100644
> --- a/drivers/sysreset/Makefile
> +++ b/drivers/sysreset/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
>   obj-$(CONFIG_SYSRESET_MCP83XX) += sysreset_mpc83xx.o
>   obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
>   obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
> +obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
>   obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
>   obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
>   obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
> diff --git a/drivers/sysreset/sysreset_socfpga.c b/drivers/sysreset/sysreset_socfpga.c
> new file mode 100644
> index 0000000000..fc1ba72d5b
> --- /dev/null
> +++ b/drivers/sysreset/sysreset_socfpga.c
> @@ -0,0 +1,56 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2019 Pepperl+Fuchs
> + * Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <sysreset.h>
> +#include <asm/io.h>
> +#include <asm/arch/reset_manager.h>
> +
> +struct socfpga_sysreset_data {
> +	struct socfpga_reset_manager *rstmgr_base;
> +};
> +
> +static int socfpga_sysreset_request(struct udevice *dev,
> +				    enum sysreset_t type)
> +{
> +	struct socfpga_sysreset_data *data = dev_get_priv(dev);
> +
> +	switch (type) {
> +	case SYSRESET_WARM:
> +		writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
> +		       &data->rstmgr_base->ctrl);
> +		break;
> +	case SYSRESET_COLD:
> +		writel(1 << RSTMGR_CTRL_SWCOLDRSTREQ_LSB,
> +		       &data->rstmgr_base->ctrl);
> +		break;
> +	default:
> +		return -EPROTONOSUPPORT;
> +	}
> +	return -EINPROGRESS;
> +}
> +
> +static int socfpga_sysreset_probe(struct udevice *dev)
> +{
> +	struct socfpga_sysreset_data *data = dev_get_priv(dev);
> +
> +	data->rstmgr_base = devfdt_get_addr_ptr(dev);
> +	return 0;
> +}
> +
> +static struct sysreset_ops socfpga_sysreset = {
> +	.request = socfpga_sysreset_request,
> +};
> +
> +U_BOOT_DRIVER(sysreset_socfpga) = {
> +	.id	= UCLASS_SYSRESET,
> +	.name	= "socfpga_sysreset",
> +	.priv_auto_alloc_size = sizeof(struct socfpga_sysreset_data),
> +	.ops	= &socfpga_sysreset,
> +	.probe	= socfpga_sysreset_probe,
> +};
>