[U-Boot] [PATCH 01/14] arm: socfpga: agilex: Add base address for Intel Agilex SoC

[Dinh Nguyen]

On 5/10/19 12:54 AM, Ley Foon Tan wrote:
> Add base address for Intel Agilex SoC.
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
> ---
>  .../include/mach/base_addr_agilex.h           | 38 +++++++++++++++++++
>  1 file changed, 38 insertions(+)
>  create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_agilex.h
> 
> diff --git a/arch/arm/mach-socfpga/include/mach/base_addr_agilex.h b/arch/arm/mach-socfpga/include/mach/base_addr_agilex.h
> new file mode 100644
> index 0000000000..e90b61f29d
> --- /dev/null
> +++ b/arch/arm/mach-socfpga/include/mach/base_addr_agilex.h
> @@ -0,0 +1,38 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
> + */
> +
> +#ifndef _SOCFPGA_AGILEX_BASE_HARDWARE_H_
> +#define _SOCFPGA_AGILEX_BASE_HARDWARE_H_
> +
> +#define SOCFPGA_CCU_ADDRESS			0xf7000000
> +#define SOCFPGA_FW_MPU_DDR_SCR_ADDRESS		0xf8020200
> +#define SOCFPGA_SMMU_ADDRESS			0xfa000000
> +#define SOCFPGA_MAILBOX_ADDRESS			0xffa30000
> +#define SOCFPGA_SPTIMER0_ADDRESS		0xffc03000
> +#define SOCFPGA_SPTIMER1_ADDRESS		0xffc03100
> +#define SOCFPGA_SYSTIMER0_ADDRESS		0xffd00000
> +#define SOCFPGA_SYSTIMER1_ADDRESS		0xffd00100
> +#define SOCFPGA_L4WD0_ADDRESS			0xffd00200
> +#define SOCFPGA_L4WD1_ADDRESS			0xffd00300
> +#define SOCFPGA_L4WD2_ADDRESS			0xffd00400
> +#define SOCFPGA_L4WD3_ADDRESS			0xffd00500
> +#define SOCFPGA_GTIMER_SEC_ADDRESS		0xffd01000
> +#define SOCFPGA_GTIMER_NSEC_ADDRESS		0xffd02000
> +#define SOCFPGA_CLKMGR_ADDRESS			0xffd10000
> +#define SOCFPGA_RSTMGR_ADDRESS			0xffd11000
> +#define SOCFPGA_SYSMGR_ADDRESS			0xffd12000
> +#define SOCFPGA_PINMUX_DEDICATED_IO_ADDRESS	0xffd13000
> +#define SOCFPGA_FIREWALL_L4_PER			0xffd21000
> +#define SOCFPGA_FIREWALL_L4_SYS			0xffd21100
> +#define SOCFPGA_FIREWALL_SOC2FPGA		0xffd21200
> +#define SOCFPGA_FIREWALL_LWSOC2FPGA		0xffd21300
> +#define SOCFPGA_FIREWALL_TCU			0xffd21400
> +#define SOCFPGA_DMANONSECURE_ADDRESS		0xffda0000
> +#define SOCFPGA_DMASECURE_ADDRESS		0xffda1000
> +#define SOCFPGA_OCRAM_ADDRESS			0xffe00000
> +#define GICD_BASE				0xfffc1000
> +#define GICC_BASE				0xfffc2000
> +
> +#endif /* _SOCFPGA_AGILEX_BASE_HARDWARE_H_ */
> 

All of these addresses are identical to the Stratix10, couldn't you just
use the Stratix10 and any diffs, you can just use fdt?

Dinh