[U-Boot] [PATCH 2/2] sunxi: Pine64: DTS: enable USB PHY 0 for HCI0

[Andre Przywara]

The first USB controller on the A64 SoC shares a PHY with the OTG
controller. Reportedly to avoid problems with the VBUS regulator under
Linux, we don't link OHCI0/EHCI0 to the USB PHY in the A64 .dtsi file.

However on boards which can't use peripheral mode (because they have an
always-on VBUS supply on an USB-A socket) we don't need this trick, and
can properly connect host controller 0 to the PHY 0.

Amend the Pine64 and SoPine/LTS .dts to reflect this. This enables the
upper USB port in U-Boot on those boards.

Signed-off-by: Andre Przywara <andre.przywara at arm.com>
---
 arch/arm/dts/sun50i-a64-pine64.dts           | 5 ++++-
 arch/arm/dts/sun50i-a64-sopine-baseboard.dts | 5 ++++-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts
index c077b6c1f4..523a4d5bff 100644
--- a/arch/arm/dts/sun50i-a64-pine64.dts
+++ b/arch/arm/dts/sun50i-a64-pine64.dts
@@ -80,6 +80,8 @@
 };
 
 &ehci0 {
+	phys = <&usbphy 0>;
+	phy-names = "usb";
 	status = "okay";
 };
 
@@ -136,6 +138,8 @@
 };
 
 &ohci0 {
+	phys = <&usbphy 0>;
+	phy-names = "usb";
 	status = "okay";
 };
 
@@ -301,7 +305,6 @@
 
 &usb_otg {
 	dr_mode = "host";
-	status = "okay";
 };
 
 &usbphy {
diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
index 53fcc9098d..1986897177 100644
--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -85,6 +85,8 @@
 };
 
 &ehci0 {
+	phys = <&usbphy 0>;
+	phy-names = "usb";
 	status = "okay";
 };
 
@@ -131,6 +133,8 @@
 };
 
 &ohci0 {
+	phys = <&usbphy 0>;
+	phy-names = "usb";
 	status = "okay";
 };
 
@@ -172,7 +176,6 @@
 
 &usb_otg {
 	dr_mode = "host";
-	status = "okay";
 };
 
 &usbphy {
-- 
2.14.5