[U-Boot] [PATCH 2/2] pci: layerscape: Add the workaround for errata A-009460
Xiaowei Bao
xiaowei.bao at nxp.com
Thu May 16 03:05:14 UTC 2019
From: Xiaowei Bao <xiaowei.bao at nxp.com>
The VF_BARn_REG register's Prefetchable and Type bit fields
are overwritten by a write to VF's BAR Mask register.
workaround: Before writing to the VF_BARn_MASK_REG register,
write 0b to the PCIE_MISC_CONTROL_1_OFF register.
Signed-off-by: Xiaowei Bao <xiaowei.bao at nxp.com>
---
drivers/pci/pcie_layerscape.c | 9 +++++++++
drivers/pci/pcie_layerscape.h | 1 +
2 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 1b082da..7ba3c1d 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -450,6 +450,15 @@ static void ls_pcie_setup_ep(struct ls_pcie *pcie)
if (PCI_EXT_CAP_ID(sriov) == PCI_EXT_CAP_ID_SRIOV) {
pcie->sriov_flag = 1;
for (pf = 0; pf < PCIE_PF_NUM; pf++) {
+ /*
+ * The VF_BARn_REG register's Prefetchable and Type bit
+ * fields are overwritten by a write to VF's BAR Mask
+ * register. Before writing to the VF_BARn_MASK_REG
+ * register, write 0b to the PCIE_MISC_CONTROL_1_OFF
+ * register.
+ */
+ writel(0, pcie->dbi + PCIE_MISC_CONTROL_1_OFF);
+
if (pcie->cfg2_flag) {
for (vf = 0; vf <= PCIE_VF_NUM; vf++) {
ctrl_writel(pcie,
diff --git a/drivers/pci/pcie_layerscape.h b/drivers/pci/pcie_layerscape.h
index 9038d32..067dd3c 100644
--- a/drivers/pci/pcie_layerscape.h
+++ b/drivers/pci/pcie_layerscape.h
@@ -94,6 +94,7 @@
#define PCIE_BAR4_SIZE SZ_1M /* 1M */
#define PCIE_SRIOV_VFBAR0 0x19C
+#define PCIE_MISC_CONTROL_1_OFF 0x8BC
#define PCIE_CTRL1_FUNC_NUM 0x00100000
#define PCIE_MASK_OFFSET(flag, pf) ((flag) ? 0 : (0x1000 + 0x20000 * (pf)))
--
1.7.1
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