[U-Boot] [EXT] Re: [PATCH 1/3 v3] armv8: ls1028a: Add NXP LS1028A SoC support

[Bin Meng]

Hi Andy,

On Fri, May 17, 2019 at 11:23 AM Andy Tang <andy.tang at nxp.com> wrote:
>
> Hi Bin,
>
> > -----Original Message-----
> > From: Bin Meng <bmeng.cn at gmail.com>
> > Sent: 2019年5月16日 20:10
> > To: Andy Tang <andy.tang at nxp.com>; Simon Glass <sjg at chromium.org>;
> > Tom Rini <trini at konsulko.com>
> > Cc: Prabhakar Kushwaha <prabhakar.kushwaha at nxp.com>; Sudhanshu
> > Gupta <sudhanshu.gupta at nxp.com>; U-Boot Mailing List
> > <u-boot at lists.denx.de>; Ran Wang <ran.wang_1 at nxp.com>; Bhaskar
> > Upadhaya <bhaskar.upadhaya at nxp.com>
> > Subject: [EXT] Re: [U-Boot] [PATCH 1/3 v3] armv8: ls1028a: Add NXP LS1028A
> > SoC support
> >
> >
> > Hi,
> >
> > On Wed, Apr 10, 2019 at 4:50 PM Yuantian Tang <andy.tang at nxp.com>
> > wrote:
> > >
> > > Ls1028a Soc is based on Layerscape Chassis Generation 3.2 architecture
> > > with features:
> > >  2 ARM v8 Cortex-A72 cores, CCI400, SEC, DDR3L/4, LCD, GPU, TSN
> > > ENETC, 2 USB 3.0, 2 eSDHC, 2 FlexCAN, 2 SPI, SATA, 8 I2C controllers,
> > >  6 LPUARTs, GPIO, SAI, qDMA, eDMA, GIC, TMU etc.
> > >
> > > Signed-off-by: Sudhanshu Gupta <sudhanshu.gupta at nxp.com>
> > > Signed-off-by: Rai Harninder <harninder.rai at nxp.com>
> > > Signed-off-by: Rajesh Bhagat <rajesh.bhagat at nxp.com>
> > > Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya at nxp.com>
> > > Signed-off-by: Tang Yuantian <andy.tang at nxp.com>
> > > ---
> > > v3:
> > >         -- fix some issues
> > >  arch/arm/cpu/armv8/fsl-layerscape/Kconfig          |  39 ++-
> > >  arch/arm/cpu/armv8/fsl-layerscape/Makefile         |   4 +
> > >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c            |   3 +
> > >  arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc   |  51 ++++
> > >  arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c |  73 ++++++
> > >  arch/arm/dts/fsl-ls1028a.dtsi                      | 280
> > +++++++++++++++++++++
> > >  arch/arm/include/asm/arch-fsl-layerscape/config.h  |  61 +++++
> > >  .../include/asm/arch-fsl-layerscape/immap_lsch3.h  |   9 +
> > >  arch/arm/include/asm/arch-fsl-layerscape/soc.h     |   1 +
> > >  .../asm/arch-fsl-layerscape/stream_id_lsch3.h      |   2 +-
> > >  10 files changed, 521 insertions(+), 2 deletions(-)  create mode
> > > 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c
> > >  create mode 100644 arch/arm/dts/fsl-ls1028a.dtsi
> > >
> >
> > I really would like to see complete DM driver support on this new platform.
> > Please consider converting appropriate codes to driver model. If there is no
> > proper uclass model, please propose one and discuss it on the list. I see the
> > existing NXP PowerPC support is stuck in such a situation that lots of codes
> > are still non-DM and we are getting close to the DM deadline. I don't want to
> > see such happens again in the NXP ARM support.
> Could you please be more specific which part of code is non-DM based?
> I checked it and didn't find where is non-DM.
> Thanks for your review.

For example, the "config ARCH_LS1028A" selects the following I2C components:

+       select SYS_I2C_MXC
+       select SYS_I2C_MXC_I2C1
+       select SYS_I2C_MXC_I2C2
+       select SYS_I2C_MXC_I2C3
+       select SYS_I2C_MXC_I2C4
+       select SYS_I2C_MXC_I2C5
+       select SYS_I2C_MXC_I2C6
+       select SYS_I2C_MXC_I2C7
+       select SYS_I2C_MXC_I2C8

These I2C# macros look to me this is not DM based. For DM such stuff
is determined from the DT automatically.

For ls1028a_serdes.c, we probably need create serdes uclass driver for it.

For arch/arm/cpu/armv8/fsl-layerscape/cpu.c, can we create a CPU
driver for it? I see lots of CONFIG_XXX_BASE and CONFIG_XXX_SIZE in
this file that come from
arch/arm/include/asm/arch-fsl-layerscape/cpu.h? Can't we get such in
DT?

Regards,
Bin