[U-Boot] [PATCH v2 4/6] ARM: dts: stm32: Add Ethernet support on stm32mp1
Christophe Roullier
christophe.roullier at st.com
Fri May 17 13:08:45 UTC 2019
This patch add Ethernet support on stm32mp157 eval board
Signed-off-by: Christophe Roullier <christophe.roullier at st.com>
---
Changes in v2: None
arch/arm/dts/stm32mp157-pinctrl.dtsi | 9 +++++++--
arch/arm/dts/stm32mp157c-ev1.dts | 2 +-
arch/arm/dts/stm32mp157c.dtsi | 16 ++++++++++------
3 files changed, 18 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi b/arch/arm/dts/stm32mp157-pinctrl.dtsi
index 0aae69b0a04..1962267033d 100644
--- a/arch/arm/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
@@ -173,13 +173,18 @@
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
- <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
<STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
bias-disable;
drive-push-pull;
- slew-rate = <3>;
+ slew-rate = <2>;
};
pins2 {
+ pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins3 {
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
index a6ee37924fe..d2232004410 100644
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -78,7 +78,7 @@
pinctrl-0 = <ðernet0_rgmii_pins_a>;
pinctrl-1 = <ðernet0_rgmii_pins_sleep_a>;
pinctrl-names = "default", "sleep";
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
max-speed = <1000>;
phy-handle = <&phy0>;
diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi
index 94634336a5e..82177b50afe 100644
--- a/arch/arm/dts/stm32mp157c.dtsi
+++ b/arch/arm/dts/stm32mp157c.dtsi
@@ -1087,21 +1087,25 @@
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>;
reg-names = "stmmaceth";
- interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "macirq";
+ interrupts-extended =
+ <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 70 1>;
+ interrupt-names = "macirq",
+ "eth_wake_irq",
+ "stm32_pwr_wakeup";
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
- "ethstp",
- "syscfg-clk";
+ "ethstp";
clocks = <&rcc ETHMAC>,
<&rcc ETHTX>,
<&rcc ETHRX>,
- <&rcc ETHSTP>,
- <&rcc SYSCFG>;
+ <&rcc ETHSTP>;
st,syscon = <&syscfg 0x4>;
snps,mixed-burst;
snps,pbl = <2>;
+ snps,en-tx-lpi-clockgating;
snps,axi-config = <&stmmac_axi_config_0>;
snps,tso;
status = "disabled";
--
2.17.1
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