[U-Boot] [PATCH 1/2] mtd: mxs_nand_spl: fix nand_command protocol violation
Stefano Babic
sbabic at denx.de
Fri May 17 14:51:54 UTC 2019
On 14/05/19 22:56, Andrea Scian - DAVE Embedded Systems wrote:
>
> Hi Michael,
> On 14/05/19 20:44, Michael Nazzareno Trimarchi wrote:
>> Hi all
>>
>> On Tue, Jan 29, 2019 at 3:40 PM Andrea Scian <andrea.scian at dave.eu>
>> wrote:
>>>
>>> mxs_nand_command() implementation assume that it's working with a
>>> LP NAND, which is a common case nowadays and thus uses two bytes
>>> for column address.
>>>
>>> However this is wrong for NAND_CMD_READID and NAND_CMD_PARAM, which
>>> expects only one byte of column address, even for LP NANDs.
>>> This leads to ONFI detection problem with some NAND manufacturer (like
>>> Winbond) but not with others (like Samsung and Spansion)
>>>
>>> We fix this with a simple workaround to avoid the 2nd byte column
>>> address
>>> for those two commands.
>>>
>>> Also align the code with nand_base to support 16 bit devices.
>>>
>>> Tested on an iMX6SX device with:
>>> * Winbond W29N04GVSIAA
>>> * Spansion S34ML04G100TF100
>>> * Samsung K9F4G08U00
>>>
>>> Signed-off-by: Andrea Scian <andrea.scian at dave.eu>
>>> CC: Stefano Babic <sbabic at denx.de>
>>
>> Is this somenthing that is already addressed?
>
> AFAIK, this is still an open problem on current master
> This patch has not been integrated and the code is the same as the one
> that have the original issue
>
As far as I see on patchwork, patch was not assigned to any maintainer -
I have now assigned to Scott (as NAND maintainer).
Stefano
> Andrea SCIAN
>
>
> *DAVE Embedded Systems*
>
> via Talponedo 29/A 33080 Porcia (PN) - Italy
> Telephone: +39.0434.921215
> Telefax: +39.0434.1994030
> web: www.dave.eu <http://www.dave.eu>
>
>
>>
>> Michael
>>
>>> ---
>>> drivers/mtd/nand/raw/mxs_nand_spl.c | 14 +++++++++++++-
>>> 1 file changed, 13 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c
>>> b/drivers/mtd/nand/raw/mxs_nand_spl.c
>>> index 2d7bbe83cc..ad3b7ade64 100644
>>> --- a/drivers/mtd/nand/raw/mxs_nand_spl.c
>>> +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
>>> @@ -22,8 +22,20 @@ static void mxs_nand_command(struct mtd_info *mtd,
>>> unsigned int command,
>>>
>>> /* Serially input address */
>>> if (column != -1) {
>>> + /* Adjust columns for 16 bit buswidth */
>>> + if (chip->options & NAND_BUSWIDTH_16 &&
>>> + !nand_opcode_8bits(command))
>>> + column >>= 1;
>>> chip->cmd_ctrl(mtd, column, NAND_ALE);
>>> - chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
>>> +
>>> + /*
>>> + * Assume LP NAND here, so use two bytes column address
>>> + * but not for CMD_READID and CMD_PARAM, which require
>>> + * only one byte column address
>>> + */
>>> + if (command != NAND_CMD_READID &&
>>> + command != NAND_CMD_PARAM)
>>> + chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
>>> }
>>> if (page_addr != -1) {
>>> chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
>>> --
>>> 2.19.2
>>>
>>> _______________________________________________
>>> U-Boot mailing list
>>> U-Boot at lists.denx.de
>>> https://lists.denx.de/listinfo/u-boot
>>
>>
>>
--
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