[U-Boot] [PATCH 4/4] ARM: renesas: Configure DRAM size from ATF DT fragment

Marek Vasut marek.vasut at gmail.com
Sun May 19 22:50:07 UTC 2019


On 4/4/19 3:45 PM, Eugeniu Rosca wrote:
> Hi Marek,

Hi,

> On Tue, Apr 02, 2019 at 05:45:29AM +0200, Marek Vasut wrote:
>> On 3/13/19 4:25 PM, Eugeniu Rosca wrote:
>>> On Tue, Mar 12, 2019 at 10:11:21PM +0100, Marek Vasut wrote:
>>>> On 3/12/19 8:30 PM, Eugeniu Rosca wrote:
>>>>> Hi Marek cc: Michael
>>>>
>>>> Hi,
>>>>
>>>>> On Tue, Mar 5, 2019 at 4:37 AM Marek Vasut <marek.vasut at gmail.com> wrote:
>>>>>>
>>>>>> The ATF can pass additional information via the first four registers,
>>>>>> x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer
>>>>>> to a device tree with platform information. Parse this device tree and
>>>>>> extract DRAM size information from it. This is useful on systems where
>>>>>> the DRAM size can vary between configurations.
>>>>>
>>>>> 1. Do the ATF changes supporting this feature already exist in mainline ATF?
>>>>
>>>> Yes, for quite some time, see
>>>> commit 1d85c4bd5b6291b99feb2409525c96f0c1744328
>>>>     plat: rcar: Pass DTB with DRAM layout from BL2 to next stages
>>>
>>> That's helpful, but I think such information should go by default into
>>> commit description.
>>>
>>> [..]
>>>
>>> Besides the above, I wonder why this patch duplicates code across three
>>> board files? Could this code be relocated to some common area like [1]?
>>
>> That's the plan.
> 
> I look forward to seeing v2 then, since this would allow us not
> duplicating this code over and over again in the board-specific files
> of the customer R-Car3 targets.
Should be fixed by
http://patchwork.ozlabs.org/patch/1101744/

[...]

-- 
Best regards,
Marek Vasut


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