[U-Boot] [PATCH v3] drivers: net: mc: Report extra memory to Linux
Meenakshi Aggarwal
meenakshi.aggarwal at nxp.com
Thu May 23 09:02:52 UTC 2019
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal at nxp.com>
---
changed for v1:
- Incorporated review comments in one board, Missed for
other boards
changed for v2:
- Incorporated review comments in all boards
changed for v3:
- Include revision history in patch
---
board/freescale/ls1088a/ls1088a.c | 34 +++++++++++++++++++++++++++++---
board/freescale/ls2080ardb/ls2080ardb.c | 35 ++++++++++++++++++++++++++++++---
board/freescale/lx2160a/lx2160a.c | 34 +++++++++++++++++++++++++++++---
drivers/net/fsl-mc/mc.c | 10 ++++++++++
include/fsl-mc/fsl_mc.h | 1 +
5 files changed, 105 insertions(+), 9 deletions(-)
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 6d11a13..88c34cb 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -28,6 +28,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#define TRUE 1
+#define FALSE 0
+
#ifdef CONFIG_TARGET_LS1088AQDS
#ifdef CONFIG_TFABOOT
struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
@@ -738,11 +741,26 @@ void fsl_fdt_fixup_flash(void *fdt)
int ft_board_setup(void *blob, bd_t *bd)
{
int i;
- u64 base[CONFIG_NR_DRAM_BANKS];
- u64 size[CONFIG_NR_DRAM_BANKS];
+ bool mc_memory_bank = FALSE;
+
+ u64 *base;
+ u64 *size;
+ u64 mc_memory_base = 0;
+ u64 mc_memory_size = 0;
+ u16 total_memory_banks;
ft_cpu_setup(blob, bd);
+ fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+ if (mc_memory_base != 0)
+ mc_memory_bank = TRUE;
+
+ total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+ base = calloc(total_memory_banks, sizeof(u64));
+ size = calloc(total_memory_banks, sizeof(u64));
+
/* fixup DT for the two GPP DDR banks */
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
base[i] = gd->bd->bi_dram[i].start;
@@ -759,7 +777,17 @@ int ft_board_setup(void *blob, bd_t *bd)
size[1] = gd->arch.resv_ram - base[1];
#endif
- fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+ if (mc_memory_base != 0) {
+ for (i = 0; i <= total_memory_banks; i++) {
+ if (base[i] == 0 && size[i] == 0) {
+ base[i] = mc_memory_base;
+ size[i] = mc_memory_size;
+ break;
+ }
+ }
+ }
+
+ fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
fdt_fsl_mc_fixup_iommu_map_entry(blob);
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index ce419df..b6b4e80 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -22,6 +22,9 @@
#include <asm/arch/ppa.h>
#include <fsl_sec.h>
+#define TRUE 1
+#define FALSE 0
+
#ifdef CONFIG_FSL_QIXIS
#include "../common/qixis.h"
#include "ls2080ardb_qixis.h"
@@ -409,11 +412,27 @@ void fsl_fdt_fixup_flash(void *fdt)
int ft_board_setup(void *blob, bd_t *bd)
{
- u64 base[CONFIG_NR_DRAM_BANKS];
- u64 size[CONFIG_NR_DRAM_BANKS];
+ int i;
+ bool mc_memory_bank = FALSE;
+
+ u64 *base;
+ u64 *size;
+ u64 mc_memory_base = 0;
+ u64 mc_memory_size = 0;
+ u16 total_memory_banks;
ft_cpu_setup(blob, bd);
+ fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+ if (mc_memory_base != 0)
+ mc_memory_bank = TRUE;
+
+ total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+ base = calloc(total_memory_banks, sizeof(u64));
+ size = calloc(total_memory_banks, sizeof(u64));
+
/* fixup DT for the two GPP DDR banks */
base[0] = gd->bd->bi_dram[0].start;
size[0] = gd->bd->bi_dram[0].size;
@@ -430,7 +449,17 @@ int ft_board_setup(void *blob, bd_t *bd)
size[1] = gd->arch.resv_ram - base[1];
#endif
- fdt_fixup_memory_banks(blob, base, size, 2);
+ if (mc_memory_base != 0) {
+ for (i = 0; i <= total_memory_banks; i++) {
+ if (base[i] == 0 && size[i] == 0) {
+ base[i] = mc_memory_base;
+ size[i] = mc_memory_size;
+ break;
+ }
+ }
+ }
+
+ fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
fdt_fsl_mc_fixup_iommu_map_entry(blob);
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 3875d04..5f6099f 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -30,6 +30,9 @@
#include "../common/emc2305.h"
#endif
+#define TRUE 1
+#define FALSE 0
+
#ifdef CONFIG_TARGET_LX2160AQDS
#define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value)
#define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f)
@@ -520,11 +523,26 @@ void board_quiesce_devices(void)
int ft_board_setup(void *blob, bd_t *bd)
{
int i;
- u64 base[CONFIG_NR_DRAM_BANKS];
- u64 size[CONFIG_NR_DRAM_BANKS];
+ bool mc_memory_bank = FALSE;
+
+ u64 *base;
+ u64 *size;
+ u64 mc_memory_base = 0;
+ u64 mc_memory_size = 0;
+ u16 total_memory_banks;
ft_cpu_setup(blob, bd);
+ fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
+
+ if (mc_memory_base != 0)
+ mc_memory_bank = TRUE;
+
+ total_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;
+
+ base = calloc(total_memory_banks, sizeof(u64));
+ size = calloc(total_memory_banks, sizeof(u64));
+
/* fixup DT for the three GPP DDR banks */
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
base[i] = gd->bd->bi_dram[i].start;
@@ -544,7 +562,17 @@ int ft_board_setup(void *blob, bd_t *bd)
size[2] = gd->arch.resv_ram - base[2];
#endif
- fdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);
+ if (mc_memory_base != 0) {
+ for (i = 0; i <= total_memory_banks; i++) {
+ if (base[i] == 0 && size[i] == 0) {
+ base[i] = mc_memory_base;
+ size[i] = mc_memory_size;
+ break;
+ }
+ }
+ }
+
+ fdt_fixup_memory_banks(blob, base, size, total_memory_banks);
#ifdef CONFIG_USB
fsl_fdt_fixup_dr_usb(blob, bd);
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index cc59b21..f424025 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
MC_FIXUP_DPL);
}
+void fdt_fixup_mc_ddr(u64 *base, u64 *size)
+{
+ u64 mc_size = mc_get_dram_block_size();
+
+ if (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {
+ *base = mc_get_dram_addr() + mc_size;
+ *size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;
+ }
+}
+
void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
{
u32 *prop;
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index 0abd797..a4d7d85 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
int get_mc_boot_status(void);
int get_dpl_apply_status(void);
int is_lazy_dpl_addr_valid(void);
+void fdt_fixup_mc_ddr(u64 *base, u64 *size);
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
int get_aiop_apply_status(void);
#endif
--
1.9.1
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