[U-Boot] [PATCH 1/2] spl: at91: add support for SPL_AT91_MCK_BYPASS

[Eugen.Hristev at microchip.com]

From: Eugen Hristev <eugen.hristev at microchip.com>

By default the configuration of the PMC is to have an external crystal
connected that requires driving on both XIN and XOUT pins.
The bypass configuration means that only XIN will be used, the SoC will not
do any driving, and the XIN needs to be provided with a proper signal.
This is the MOSCXTBY bit in the PMC main clock generator register.
The SPL needs to properly initialize the PMC registers before switching
to external clock signal and raising the clock to the cruise speed.

Also created Kconfig for this specific configuration.
By default this is disabled.

Signed-off-by: Eugen Hristev <eugen.hristev at microchip.com>
---
 arch/arm/mach-at91/spl_atmel.c |  8 ++++++++
 common/spl/Kconfig             | 12 ++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index ef745c9..85290be 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -44,7 +44,15 @@ static void switch_to_main_crystal_osc(void)
 #endif
 
 	tmp = readl(&pmc->mor);
+/*
+ * some boards have an external oscillator with driving.
+ * in this case we need to disable the internal SoC driving (bypass mode)
+ */
+#if defined(CONFIG_SPL_AT91_MCK_BYPASS)
+	tmp |= AT91_PMC_MOR_OSCBYPASS;
+#else
 	tmp &= ~AT91_PMC_MOR_OSCBYPASS;
+#endif
 	tmp &= ~AT91_PMC_MOR_KEY(0xff);
 	tmp |= AT91_PMC_MOR_KEY(0x37);
 	writel(tmp, &pmc->mor);
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index dd078fe..0d01353 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -1151,5 +1151,17 @@ config TPL_YMODEM_SUPPORT
 
 endif # TPL
 
+config SPL_AT91_MCK_BYPASS
+	bool "Use external clock signal as a source of main clock for AT91 platforms"
+	depends on ARCH_AT91
+	default n
+	help
+	  Use external 8 to 24 Mhz clock signal as source of main clock instead
+	  of an external crystal oscillator.
+	  This option disables the internal driving on the XOUT pin.
+	  The external source has to provide a stable clock on the XIN pin.
+	  If this option is disabled, the SoC expects a crystal oscillator
+	  that needs driving on both XIN and XOUT lines.
+
 endif # SPL
 endmenu
-- 
2.7.4