[U-Boot] [PATCH v2 2/5] dm: spi: Convert Freescale ESPI driver to driver model

Chuanhua Han chuanhua.han at nxp.com
Fri May 24 04:40:54 UTC 2019


Modify the Freescale ESPI driver to support the driver model.
Also resolved the following problems:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

Signed-off-by: Chuanhua Han <chuanhua.han at nxp.com>
---
Changes in v2:
	- The fsl_espi driver support both OF_CONTROL and PLATDATA

 drivers/spi/fsl_espi.c | 454 +++++++++++++++++++++++++++++------------
 1 file changed, 320 insertions(+), 134 deletions(-)

diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 7444ae1a06..a2f4027fca 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -4,17 +4,27 @@
  *
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  * Author: Mingkai Hu (Mingkai.hu at freescale.com)
+ *	   Chuanhua Han (chuanhua.han at nxp.com)
  */
 
 #include <common.h>
-
 #include <malloc.h>
 #include <spi.h>
 #include <asm/immap_85xx.h>
+#include <dm.h>
+#include <errno.h>
+#include <fdtdec.h>
+
+struct fsl_espi_platdata {
+	uint flags;
+	uint speed_hz;
+	uint num_chipselect;
+	fdt_addr_t regs_addr;
+};
 
-struct fsl_spi_slave {
-	struct spi_slave slave;
+struct fsl_espi_priv {
 	ccsr_espi_t	*espi;
+	u32 speed_hz;
 	unsigned int	div16;
 	unsigned int	pm;
 	int		tx_timeout;
@@ -25,9 +35,18 @@ struct fsl_spi_slave {
 	unsigned int    max_transfer_length;
 };
 
+struct fsl_spi_slave {
+	struct spi_slave slave;
+	struct fsl_espi_priv priv;
+};
+
 #define to_fsl_spi_slave(s) container_of(s, struct fsl_spi_slave, slave)
+#define to_fsl_spi_priv(p) container_of(p, struct fsl_spi_slave, priv)
 #define US_PER_SECOND		1000000UL
 
+/* default SCK frequency, unit: HZ */
+#define FSL_ESPI_DEFAULT_SCK_FREQ   10000000
+
 #define ESPI_MAX_CS_NUM		4
 #define ESPI_FIFO_WIDTH_BIT	32
 
@@ -62,121 +81,46 @@ struct fsl_spi_slave {
 
 #define ESPI_MAX_DATA_TRANSFER_LEN 0xFFF0
 
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-		unsigned int max_hz, unsigned int mode)
-{
-	struct fsl_spi_slave *fsl;
-	sys_info_t sysinfo;
-	unsigned long spibrg = 0;
-	unsigned long spi_freq = 0;
-	unsigned char pm = 0;
-
-	if (!spi_cs_is_valid(bus, cs))
-		return NULL;
-
-	fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
-	if (!fsl)
-		return NULL;
-
-	fsl->espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
-	fsl->mode = mode;
-	fsl->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
-
-	/* Set eSPI BRG clock source */
-	get_sys_info(&sysinfo);
-	spibrg = sysinfo.freq_systembus / 2;
-	fsl->div16 = 0;
-	if ((spibrg / max_hz) > 32) {
-		fsl->div16 = ESPI_CSMODE_DIV16;
-		pm = spibrg / (max_hz * 16 * 2);
-		if (pm > 16) {
-			pm = 16;
-			debug("Requested speed is too low: %d Hz, %ld Hz "
-				"is used.\n", max_hz, spibrg / (32 * 16));
-		}
-	} else
-		pm = spibrg / (max_hz * 2);
-	if (pm)
-		pm--;
-	fsl->pm = pm;
-
-	if (fsl->div16)
-		spi_freq = spibrg / ((pm + 1) * 2 * 16);
-	else
-		spi_freq = spibrg / ((pm + 1) * 2);
-
-	/* set tx_timeout to 10 times of one espi FIFO entry go out */
-	fsl->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
-				* 10), spi_freq);
-
-	return &fsl->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
+#ifndef CONFIG_DM_SPI
+void spi_cs_activate(struct spi_slave *slave)
 {
 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
-	free(fsl);
-}
+	ccsr_espi_t *espi = fsl->priv.espi;
+	unsigned int com = 0;
+	size_t data_len = fsl->priv.data_len;
 
-int spi_claim_bus(struct spi_slave *slave)
+	com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
+	com |= ESPI_COM_CS(slave->cs);
+	com |= ESPI_COM_TRANLEN(data_len - 1);
+	out_be32(&espi->com, com);
+}
+#else
+void fsl_spi_cs_activate(struct fsl_espi_priv *priv,  uint cs)
 {
-	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
-	ccsr_espi_t *espi = fsl->espi;
-	unsigned char pm = fsl->pm;
-	unsigned int cs = slave->cs;
-	unsigned int mode =  fsl->mode;
-	unsigned int div16 = fsl->div16;
-	int i;
-
-	debug("%s: bus:%i cs:%i\n", __func__, slave->bus, cs);
-
-	/* Enable eSPI interface */
-	out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
-			| ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
-
-	out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
-	out_be32(&espi->mask, 0x00000000); /* Mask  all eSPI interrupts */
-
-	/* Init CS mode interface */
-	for (i = 0; i < ESPI_MAX_CS_NUM; i++)
-		out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
-
-	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
-		~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
-		| ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
-		| ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
-
-	/* Set eSPI BRG clock source */
-	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
-		| ESPI_CSMODE_PM(pm) | div16);
-
-	/* Set eSPI mode */
-	if (mode & SPI_CPHA)
-		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
-			| ESPI_CSMODE_CP_BEGIN_EDGCLK);
-	if (mode & SPI_CPOL)
-		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
-			| ESPI_CSMODE_CI_INACTIVEHIGH);
-
-	/* Character bit order: msb first */
-	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
-		| ESPI_CSMODE_REV_MSB_FIRST);
-
-	/* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
-	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
-		| ESPI_CSMODE_LEN(7));
+	ccsr_espi_t *espi = priv->espi;
+	unsigned int com = 0;
+	size_t data_len = priv->data_len;
 
-	return 0;
+	com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
+	com |= ESPI_COM_CS(cs);
+	com |= ESPI_COM_TRANLEN(data_len - 1);
+	out_be32(&espi->com, com);
 }
+#endif
 
-void spi_release_bus(struct spi_slave *slave)
+void spi_cs_deactivate(struct spi_slave *slave)
 {
+	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
+	ccsr_espi_t *espi = fsl->priv.espi;
 
+	/* clear the RXCNT and TXCNT */
+	out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
+	out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
 }
 
-static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
+static void fsl_espi_tx(struct fsl_espi_priv *priv, const void *dout)
 {
-	ccsr_espi_t *espi = fsl->espi;
+	ccsr_espi_t *espi = priv->espi;
 	unsigned int tmpdout, event;
 	int tmp_tx_timeout;
 
@@ -189,7 +133,7 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
 	out_be32(&espi->event, ESPI_EV_TNF);
 	debug("***spi_xfer:...%08x written\n", tmpdout);
 
-	tmp_tx_timeout = fsl->tx_timeout;
+	tmp_tx_timeout = priv->tx_timeout;
 	/* Wait for eSPI transmit to go out */
 	while (tmp_tx_timeout--) {
 		event = in_be32(&espi->event);
@@ -204,9 +148,10 @@ static void fsl_espi_tx(struct fsl_spi_slave *fsl, const void *dout)
 		debug("***spi_xfer:...Tx timeout! event = %08x\n", event);
 }
 
-static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)
+static int fsl_espi_rx(struct fsl_espi_priv *priv, void *din,
+		       unsigned int bytes)
 {
-	ccsr_espi_t *espi = fsl->espi;
+	ccsr_espi_t *espi = priv->espi;
 	unsigned int tmpdin, rx_times;
 	unsigned char *buf, *p_cursor;
 
@@ -236,11 +181,12 @@ static int fsl_espi_rx(struct fsl_spi_slave *fsl, void *din, unsigned int bytes)
 	return bytes;
 }
 
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
-		void *data_in, unsigned long flags)
+int espi_xfer(struct fsl_espi_priv *priv,  uint cs, unsigned int bitlen,
+	      const void *data_out, void *data_in, unsigned long flags)
 {
-	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
-	ccsr_espi_t *espi = fsl->espi;
+	struct fsl_spi_slave *fsl = to_fsl_spi_priv(priv);
+	struct spi_slave *slave = &fsl->slave;
+	ccsr_espi_t *espi = priv->espi;
 	unsigned int event, rx_bytes;
 	const void *dout = NULL;
 	void *din = NULL;
@@ -249,16 +195,17 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 	int num_bytes;
 	unsigned char *buffer = NULL;
 	size_t buf_len;
-	u8 *cmd_buf = fsl->cmd_buf;
-	size_t cmd_len = fsl->cmd_len;
+	u8 *cmd_buf = priv->cmd_buf;
+	size_t cmd_len = priv->cmd_len;
 	size_t data_len = bitlen / 8;
 	size_t rx_offset = 0;
 	int rf_cnt;
 
-	max_tran_len = fsl->max_transfer_length;
+	max_tran_len = priv->max_transfer_length;
 	switch (flags) {
 	case SPI_XFER_BEGIN:
-		cmd_len = fsl->cmd_len = data_len;
+		cmd_len = data_len;
+		priv->cmd_len = cmd_len;
 		memcpy(cmd_buf, data_out, cmd_len);
 		return 0;
 	case 0:
@@ -303,8 +250,13 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 		tran_len = min(data_len, (size_t)max_tran_len);
 		num_blks = DIV_ROUND_UP(tran_len + cmd_len, 4);
 		num_bytes = (tran_len + cmd_len) % 4;
-		fsl->data_len = tran_len + cmd_len;
-		spi_cs_activate(slave);
+		priv->data_len = tran_len + cmd_len;
+		#ifdef CONFIG_DM_SPI
+			fsl_spi_cs_activate(priv, cs);
+		#else
+			spi_cs_activate(slave);
+		#endif
+
 
 		/* Clear all eSPI events */
 		out_be32(&espi->event , 0xffffffff);
@@ -312,7 +264,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 		while (num_blks) {
 			event = in_be32(&espi->event);
 			if (event & ESPI_EV_TNF) {
-				fsl_espi_tx(fsl, dout);
+				fsl_espi_tx(priv, dout);
 				/* Set up the next iteration */
 				if (len > 4) {
 					len -= 4;
@@ -330,7 +282,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 					rx_bytes = num_bytes;
 				else
 					continue;
-				if (fsl_espi_rx(fsl, din, rx_bytes)
+				if (fsl_espi_rx(priv, din, rx_bytes)
 						== rx_bytes) {
 					num_blks--;
 					if (din)
@@ -354,30 +306,264 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *data_out,
 	return 0;
 }
 
+void espi_claim_bus(struct fsl_espi_priv *priv, unsigned int cs)
+{
+	ccsr_espi_t *espi = priv->espi;
+	unsigned char pm = priv->pm;
+	unsigned int mode =  priv->mode;
+	unsigned int div16 = priv->div16;
+	int i;
+
+	/* Enable eSPI interface */
+	out_be32(&espi->mode, ESPI_MODE_RXTHR(3)
+			| ESPI_MODE_TXTHR(4) | ESPI_MODE_EN);
+
+	out_be32(&espi->event, 0xffffffff); /* Clear all eSPI events */
+	out_be32(&espi->mask, 0x00000000); /* Mask  all eSPI interrupts */
+
+	/* Init CS mode interface */
+	for (i = 0; i < ESPI_MAX_CS_NUM; i++)
+		out_be32(&espi->csmode[i], ESPI_CSMODE_INIT_VAL);
+
+	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs]) &
+		~(ESPI_CSMODE_PM(0xF) | ESPI_CSMODE_DIV16
+		| ESPI_CSMODE_CI_INACTIVEHIGH | ESPI_CSMODE_CP_BEGIN_EDGCLK
+		| ESPI_CSMODE_REV_MSB_FIRST | ESPI_CSMODE_LEN(0xF)));
+
+	/* Set eSPI BRG clock source */
+	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
+		| ESPI_CSMODE_PM(pm) | div16);
+
+	/* Set eSPI mode */
+	if (mode & SPI_CPHA)
+		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
+			| ESPI_CSMODE_CP_BEGIN_EDGCLK);
+	if (mode & SPI_CPOL)
+		out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
+			| ESPI_CSMODE_CI_INACTIVEHIGH);
+
+	/* Character bit order: msb first */
+	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
+		| ESPI_CSMODE_REV_MSB_FIRST);
+
+	/* Character length in bits, between 0x3~0xf, i.e. 4bits~16bits */
+	out_be32(&espi->csmode[cs], in_be32(&espi->csmode[cs])
+		| ESPI_CSMODE_LEN(7));
+}
+
+void espi_setup_slave(struct fsl_espi_priv *priv)
+{
+	unsigned int max_hz;
+	sys_info_t sysinfo;
+	unsigned long spibrg = 0;
+	unsigned long spi_freq = 0;
+	unsigned char pm = 0;
+
+	max_hz = priv->speed_hz;
+
+	get_sys_info(&sysinfo);
+	spibrg = sysinfo.freq_systembus / 2;
+	priv->div16 = 0;
+	if ((spibrg / max_hz) > 32) {
+		priv->div16 = ESPI_CSMODE_DIV16;
+		pm = spibrg / (max_hz * 16 * 2);
+		if (pm > 16) {
+			pm = 16;
+			debug("max_hz is too low: %d Hz, %ld Hz is used.\n",
+			      max_hz, spibrg / (32 * 16));
+		}
+	} else {
+		pm = spibrg / (max_hz * 2);
+	}
+	if (pm)
+		pm--;
+	priv->pm = pm;
+
+	if (priv->div16)
+		spi_freq = spibrg / ((pm + 1) * 2 * 16);
+	else
+		spi_freq = spibrg / ((pm + 1) * 2);
+
+	/* set tx_timeout to 10 times of one espi FIFO entry go out */
+	priv->tx_timeout = DIV_ROUND_UP((US_PER_SECOND * ESPI_FIFO_WIDTH_BIT
+				* 10), spi_freq);/* Set eSPI BRG clock source */
+}
+
+#ifndef CONFIG_DM_SPI
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
 	return bus == 0 && cs < ESPI_MAX_CS_NUM;
 }
 
-void spi_cs_activate(struct spi_slave *slave)
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+				  unsigned int max_hz, unsigned int mode)
+{
+	struct fsl_spi_slave *fsl;
+
+	if (!spi_cs_is_valid(bus, cs))
+		return NULL;
+
+	fsl = spi_alloc_slave(struct fsl_spi_slave, bus, cs);
+	if (!fsl)
+		return NULL;
+
+	fsl->priv.espi = (void *)(CONFIG_SYS_MPC85xx_ESPI_ADDR);
+	fsl->priv.mode = mode;
+	fsl->priv.max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
+	fsl->priv.speed_hz = FSL_ESPI_DEFAULT_SCK_FREQ;
+
+	espi_setup_slave(&fsl->priv);
+
+	return &fsl->slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
 {
 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
-	ccsr_espi_t *espi = fsl->espi;
-	unsigned int com = 0;
-	size_t data_len = fsl->data_len;
 
-	com &= ~(ESPI_COM_CS(0x3) | ESPI_COM_TRANLEN(0xFFFF));
-	com |= ESPI_COM_CS(slave->cs);
-	com |= ESPI_COM_TRANLEN(data_len - 1);
-	out_be32(&espi->com, com);
+	free(fsl);
 }
 
-void spi_cs_deactivate(struct spi_slave *slave)
+int spi_claim_bus(struct spi_slave *slave)
 {
 	struct fsl_spi_slave *fsl = to_fsl_spi_slave(slave);
-	ccsr_espi_t *espi = fsl->espi;
 
-	/* clear the RXCNT and TXCNT */
-	out_be32(&espi->mode, in_be32(&espi->mode) & (~ESPI_MODE_EN));
-	out_be32(&espi->mode, in_be32(&espi->mode) | ESPI_MODE_EN);
+	espi_claim_bus(&fsl->priv, slave->cs);
+
+	return 0;
+}
+
+void spi_release_bus(struct spi_slave *slave)
+{
+	/* Nothing to do */
+}
+
+int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
+	     void *din, unsigned long flags)
+{
+	struct fsl_spi_slave *espi = (struct fsl_spi_slave *)slave;
+
+	return espi_xfer(&espi->priv, slave->cs, bitlen, dout, din, flags);
+}
+#else
+static int fsl_espi_claim_bus(struct udevice *dev)
+{
+	struct udevice *bus = dev->parent;
+	struct dm_spi_slave_platdata *slave_plat =
+		 dev_get_parent_platdata(dev);
+
+	struct fsl_espi_priv  *priv =  dev_get_priv(bus);
+
+	espi_claim_bus(priv, slave_plat->cs);
+
+	return 0;
+}
+
+static int fsl_espi_release_bus(struct udevice *dev)
+{
+	/* Nothing to do */
+	return 0;
+}
+
+static int fsl_espi_xfer(struct udevice *dev, unsigned int bitlen,
+			 const void *dout, void *din, unsigned long flags)
+{
+	struct fsl_espi_priv  *priv;
+	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+	struct udevice *bus;
+
+	bus = dev->parent;
+	priv = dev_get_priv(bus);
+	return espi_xfer(priv, slave_plat->cs, bitlen, dout, din, flags);
+}
+
+static int fsl_espi_set_speed(struct udevice *bus, uint speed)
+{
+	/* Nothing to do */
+	return 0;
+}
+
+static int fsl_espi_set_mode(struct udevice *bus, uint mode)
+{
+	/* Nothing to do */
+	return 0;
 }
+
+static int fsl_espi_probe(struct udevice *bus)
+{
+	struct fsl_espi_platdata *plat = dev_get_platdata(bus);
+	struct fsl_espi_priv *priv = dev_get_priv(bus);
+
+	priv->espi = (ccsr_espi_t *)((u32)plat->regs_addr);
+	priv->max_transfer_length = ESPI_MAX_DATA_TRANSFER_LEN;
+	priv->speed_hz = plat->speed_hz;
+
+	espi_setup_slave(priv);
+
+	debug("%s probe done, bus-num %d.\n", bus->name, bus->seq);
+	return 0;
+}
+
+static int fsl_espi_child_pre_probe(struct udevice *dev)
+{
+	/* Nothing to do */
+	return 0;
+}
+
+static int fsl_espi_bind(struct udevice *bus)
+{
+	debug("%s assigned req_seq %d.\n", bus->name, bus->req_seq);
+	return 0;
+}
+
+static const struct dm_spi_ops fsl_espi_ops = {
+	.claim_bus	= fsl_espi_claim_bus,
+	.release_bus	= fsl_espi_release_bus,
+	.xfer		= fsl_espi_xfer,
+	.set_speed	= fsl_espi_set_speed,
+	.set_mode	= fsl_espi_set_mode,
+};
+
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+static int fsl_espi_ofdata_to_platdata(struct udevice *bus)
+{
+	fdt_addr_t addr;
+	struct fsl_espi_platdata   *plat = bus->platdata;
+	const void *blob = gd->fdt_blob;
+	int node = dev_of_offset(bus);
+
+	addr = dev_read_addr(bus);
+	if (addr == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	plat->regs_addr = lower_32_bits(addr);
+	plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
+					FSL_ESPI_DEFAULT_SCK_FREQ);
+
+	debug("ESPI: regs=%p, max-frequency=%d\n",
+	      &plat->regs_addr, plat->speed_hz);
+
+	return 0;
+}
+
+static const struct udevice_id fsl_espi_ids[] = {
+	{ .compatible = "fsl,mpc8536-espi" },
+	{ }
+};
+#endif
+
+U_BOOT_DRIVER(fsl_espi) = {
+	.name	= "fsl_espi",
+	.id	= UCLASS_SPI,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.of_match = fsl_espi_ids,
+	.ofdata_to_platdata = fsl_espi_ofdata_to_platdata,
+#endif
+	.ops	= &fsl_espi_ops,
+	.platdata_auto_alloc_size = sizeof(struct fsl_espi_platdata),
+	.priv_auto_alloc_size = sizeof(struct fsl_espi_priv),
+	.probe	= fsl_espi_probe,
+	.child_pre_probe = fsl_espi_child_pre_probe,
+	.bind = fsl_espi_bind,
+};
+#endif
-- 
2.17.1



More information about the U-Boot mailing list