[U-Boot] [PATCH v2] spi: cadence_qspi: support DM_CLK
Simon Goldschmidt
simon.k.r.goldschmidt at gmail.com
Sun Nov 10 14:37:58 UTC 2019
Vignesh Raghavendra <vigneshr at ti.com> schrieb am So., 10. Nov. 2019, 12:41:
> Hi Simon,
>
> On 24-Oct-19 11:53 PM, Simon Goldschmidt wrote:
> > From: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> >
> > Support loading clk speed via DM instead of requiring ad-hoc code.
> >
> > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> > Signed-off-by: Simon Goldschmidt <goldsimon at gmx.de>
> > ---
> [...]
> > @@ -22,12 +23,29 @@ static int cadence_spi_write_speed(struct udevice
> *bus, uint hz)
> > {
> > struct cadence_spi_platdata *plat = bus->platdata;
> > struct cadence_spi_priv *priv = dev_get_priv(bus);
> > + unsigned int ref_clk_hz;
> > + struct clk clk;
> > + int ret;
> > +
> > + ret = clk_get_by_index(bus, 0, &clk);
> > + if (ret) {
> > +#ifdef CONFIG_CQSPI_REF_CLK
> > + ref_clk_hz = CONFIG_CQSPI_REF_CLK;
> > +#else
> > + return ret;
> > +#endif
> > + } else {
> > + ref_clk_hz = clk_get_rate(&clk);
> > + clk_free(&clk);
> > + if (IS_ERR_VALUE(ref_clk_hz))
> > + return ref_clk_hz;
> > + }
> >
>
> Can this be moved to probe function instead? cadence_spi_write_speed()
> is called multiple times from spi_calibration() and doing
> clk_get_by_index() and clk_get_rate() each time seems to be additional
> overhead.
>
Sure, that would indeed be better.
Regards,
Simon
> Regards
> Vignesh
>
>
> > cadence_qspi_apb_config_baudrate_div(priv->regbase,
> > - CONFIG_CQSPI_REF_CLK, hz);
> > + ref_clk_hz, hz);
> >
> > /* Reconfigure delay timing if speed is changed. */
> > - cadence_qspi_apb_delay(priv->regbase, CONFIG_CQSPI_REF_CLK, hz,
> > + cadence_qspi_apb_delay(priv->regbase, ref_clk_hz, hz,
> > plat->tshsl_ns, plat->tsd2d_ns,
> > plat->tchsh_ns, plat->tslch_ns);
> >
> >
>
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