[U-Boot] [PATCH 35/42] board: freescale: ls1021aqds: support dm_i2c_* API

[Biwen Li]

This supports dm_i2c_* API
to fix compilation error when
enabled CONFIG_DM_I2C as follows:
	- board/freescale/ls1021aqds/built-in.o: In function `select_i2c_ch_pca9547:
	  board/freescale/ls1021aqds/ls1021aqds.c:144: undefined reference to
	  `i2c_write'`

Signed-off-by: Biwen Li <biwen.li at nxp.com>
---
 board/freescale/ls1021aqds/ls1021aqds.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 2ca2bd9909..a3168649ff 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -137,11 +137,23 @@ unsigned long get_board_ddr_clk(void)
 	return 66666666;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
 
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -156,8 +168,10 @@ int dram_init(void)
 	 * When resuming from deep sleep, the I2C channel may not be
 	 * in the default channel. So, switch to the default channel
 	 * before accessing DDR SPD.
+	 *
+	 * PCA9547(0x77) mount on I2C1 bus
 	 */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 	return fsl_initdram();
 }
 
@@ -419,7 +433,7 @@ int board_init(void)
 	erratum_a009942_check_cpo();
 #endif
 
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 #ifndef CONFIG_SYS_FSL_NO_SERDES
 	fsl_serdes_init();
-- 
2.17.1