[U-Boot] [PATCH v3 068/108] x86: Add an option to control the position of U-Boot

[Bin Meng]

Hi Simon,

On Mon, Oct 21, 2019 at 11:40 AM Simon Glass <sjg at chromium.org> wrote:
>
> The existing work-around for positioning U-Boot in the ROM when it
> actually runs from RAM still exists and there is not obvious way to change
> this.
>
> Add a proper Kconfig option to handle this case. This also adds a new bool
> property to indicate whether CONFIG_SYS_TEXT_BASE exists.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
>  Kconfig                                |  9 ++++++---
>  arch/x86/Kconfig                       |  5 +++++
>  arch/x86/dts/u-boot.dtsi               | 18 +++---------------
>  configs/chromebook_samus_tpl_defconfig |  1 +
>  4 files changed, 15 insertions(+), 18 deletions(-)
>
> diff --git a/Kconfig b/Kconfig
> index 66b059f749a..86161b662de 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -530,9 +530,14 @@ config SYS_EXTRA_OPTIONS
>           configuration to Kconfig. Since this option will be removed sometime,
>           new boards should not use this option.
>
> -config SYS_TEXT_BASE
> +config HAS_SYS_TEXT_BASE

nits: HAVE_SYS_TEXT_BASE for consistent names

> +       bool
>         depends on !NIOS2 && !XTENSA
>         depends on !EFI_APP
> +       default y
> +
> +config SYS_TEXT_BASE
> +       depends on HAS_SYS_TEXT_BASE
>         default 0x80800000 if ARCH_OMAP2PLUS || ARCH_K3
>         default 0x4a000000 if ARCH_SUNXI && !MACH_SUN9I && !MACH_SUN8I_V3S
>         default 0x2a000000 if ARCH_SUNXI && MACH_SUN9I
> @@ -541,8 +546,6 @@ config SYS_TEXT_BASE
>         help
>           The address in memory that U-Boot will be running from, initially.
>
> -
> -
>  config SYS_CLK_FREQ
>         depends on ARC || ARCH_SUNXI || MPC83xx
>         int "CPU clock frequency"
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 37e94d8913a..f015e380f90 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -909,4 +909,9 @@ config CACHE_QOS_SIZE_PER_BIT
>         depends on INTEL_CAR_CQOS
>         default 0x20000 # 128 KB
>
> +config X86_OFFSET_U_BOOT
> +       hex "Offset of U-Boot in ROM image"
> +       depends on HAS_SYS_TEXT_BASE
> +       default SYS_TEXT_BASE
> +
>  endmenu
> diff --git a/arch/x86/dts/u-boot.dtsi b/arch/x86/dts/u-boot.dtsi
> index 51d003dcfe1..66c4fdc8f8a 100644
> --- a/arch/x86/dts/u-boot.dtsi
> +++ b/arch/x86/dts/u-boot.dtsi
> @@ -50,7 +50,7 @@
>         u-boot-spl-dtb {
>         };
>         u-boot {
> -               offset = <CONFIG_SYS_TEXT_BASE>;
> +               offset = <CONFIG_X86_OFFSET_U_BOOT>;
>         };
>  #elif defined(CONFIG_SPL)
>         u-boot-spl-with-ucode-ptr {
> @@ -60,23 +60,11 @@
>                 type = "u-boot-dtb-with-ucode";
>         };
>         u-boot {
> -               /*
> -                * TODO(sjg at chromium.org):
> -                * Normally we use CONFIG_SYS_TEXT_BASE as the flash offset. But
> -                * for boards with textbase in SDRAM we cannot do this. Just use
> -                * an assumed-valid value (1MB before the end of flash) here so
> -                * that we can actually build an image for coreboot, etc.
> -                * We need a better solution, perhaps a separate Kconfig.
> -                */
> -#if CONFIG_SYS_TEXT_BASE == 0x1110000
> -               offset = <0xfff00000>;
> -#else
> -               offset = <CONFIG_SYS_TEXT_BASE>;
> -#endif
> +               offset = <CONFIG_X86_OFFSET_U_BOOT>;
>         };
>  #else
>         u-boot-with-ucode-ptr {
> -               offset = <CONFIG_SYS_TEXT_BASE>;
> +               offset = <CONFIG_X86_OFFSET_U_BOOT>;
>         };
>  #endif
>  #ifdef CONFIG_HAVE_MICROCODE
> diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
> index 28f23cfe125..c7f125eaa40 100644
> --- a/configs/chromebook_samus_tpl_defconfig
> +++ b/configs/chromebook_samus_tpl_defconfig
> @@ -13,6 +13,7 @@ CONFIG_HAVE_REFCODE=y
>  CONFIG_SMP=y
>  CONFIG_HAVE_VGA_BIOS=y
>  CONFIG_SPL_TEXT_BASE=0xffe70000
> +CONFIG_X86_OFFSET_U_BOOT=0xfff00000

Should we update other x86 board defconfig files for this option?

>  CONFIG_BOOTSTAGE=y
>  CONFIG_BOOTSTAGE_REPORT=y
>  CONFIG_SHOW_BOOT_PROGRESS=y
> --

Regards,
Bin