[U-Boot] [RFC PATCH 02/29] include: pci: Increase max pci region limit

Simon Glass sjg at chromium.org
Wed Nov 20 03:00:03 UTC 2019


Hi Suneel,

On Tue, 29 Oct 2019 at 14:08, Suneel Garapati <suneelglinux at gmail.com> wrote:
>
> From: Suneel Garapati <sgarapati at marvell.com>
>
> Increase MAX_PCI_REGIONS limit from 7 to 10. For some SoC's
> like OcteonTX/TX2 where everything is on PCI bus there is
> need for extra entries to support required peripherals.
>
> Signed-off-by: Suneel Garapati <sgarapati at marvell.com>
> ---
>  include/pci.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/pci.h b/include/pci.h
> index ff59ac0e69..0b14842285 100644
> --- a/include/pci.h
> +++ b/include/pci.h
> @@ -567,7 +567,7 @@ extern void pci_cfgfunc_do_nothing(struct pci_controller* hose, pci_dev_t dev,
>  extern void pci_cfgfunc_config_device(struct pci_controller* hose, pci_dev_t dev,
>                                       struct pci_config_table *);
>
> -#define MAX_PCI_REGIONS                7
> +#define MAX_PCI_REGIONS                10

This needs to be dynamic, with malloc() used to allocate the space in
struct pci_controller, after calculating how many entries there are.
The current scheme and your patch breaks x86 devices with limited
pre-reloc memory.

Regards,
Simon


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