[U-Boot] [PATCH v2 2/2] rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb

[Philipp Tomsich]

> On 19.11.2019, at 12:04, Heiko Stuebner <heiko at sntech.de> wrote:
> 
> From: Heiko Stuebner <heiko.stuebner at theobroma-systems.com>
> 
> As part of loading trustedfirmware, the SPL is required to place portions
> of code into the socs sram but the mmc controllers can only do dma
> transfers into the regular memory, not sram.
> 
> The results of this are not directly visible in u-boot itself, but
> manifest as security-relate cpu aborts during boot of for example Linux.
> 
> There were a number of attempts to solve this elegantly but so far
> discussion is still ongoing, so to make the board at least boot correctly
> put both mmc controllers into fifo-mode, which also circumvents the
> issue for now.
> 
> Signed-off-by: Heiko Stuebner <heiko.stuebner at theobroma-systems.com>

Reviewed-by: Philipp Tomsich <philipp.tomsich at theobroma-systems.com>