[U-Boot] [PATCH 1/2] ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable

[Simon Goldschmidt]

On Thu, Nov 21, 2019 at 10:56 AM Tan, Ley Foon <ley.foon.tan at intel.com> wrote:
>
>
>
> > -----Original Message-----
> > From: Marek Vasut <marex at denx.de>
> > Sent: Thursday, November 21, 2019 5:35 AM
> > To: u-boot at lists.denx.de
> > Cc: Marek Vasut <marex at denx.de>; See, Chin Liang
> > <chin.liang.see at intel.com>; Dalon Westergreen <dwesterg at gmail.com>;
> > Dinh Nguyen <dinguyen at kernel.org>; Tan, Ley Foon
> > <ley.foon.tan at intel.com>; Simon Goldschmidt
> > <simon.k.r.goldschmidt at gmail.com>; Chee, Tien Fong
> > <tien.fong.chee at intel.com>
> > Subject: [PATCH 1/2] ARM: socfpga: Actually put bridges into reset on Gen5
> > in bridge disable
> >
> > On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register,
> > which releases all bridges from reset, instead of putting all bridges into reset.
> > Fix this by inverting the mask and actually putting the bridges into reset.

Haha, I didn't notice that as I only used 'bridge enable' so far :-)

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>

> >
> > Signed-off-by: Marek Vasut <marex at denx.de>
> > Cc: Chin Liang See <chin.liang.see at intel.com>
> > Cc: Dalon Westergreen <dwesterg at gmail.com>
> > Cc: Dinh Nguyen <dinguyen at kernel.org>
> > Cc: Ley Foon Tan <ley.foon.tan at intel.com>
> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> > Cc: Tien Fong Chee <tien.fong.chee at intel.com>
>
> Reviewed-by: Ley Foon Tan <ley.foon.tan at intel.com>
>
> > ---
> >  arch/arm/mach-socfpga/misc_gen5.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-
> > socfpga/misc_gen5.c
> > index 31681b799d..36f00aee31 100644
> > --- a/arch/arm/mach-socfpga/misc_gen5.c
> > +++ b/arch/arm/mach-socfpga/misc_gen5.c
> > @@ -231,7 +231,7 @@ void do_bridge_reset(int enable, unsigned int mask)
> >       } else {
> >               writel(0, &sysmgr_regs->fpgaintfgrp_module);
> >               writel(0, &sdr_ctrl->fpgaport_rst);
> > -             writel(0, &reset_manager_base->brg_mod_reset);
> > +             writel(0x7, &reset_manager_base->brg_mod_reset);
> >               writel(1, &nic301_regs->remap);
> >       }
> >  }
> > --
> > 2.24.0.432.g9d3f5f5b63
>