[U-Boot] [PATCH] ARM: socfpga: Introduce u-boot-with-nand-spl.sfp target

[Simon Goldschmidt]

On Wed, Nov 20, 2019 at 10:36 PM Marek Vasut <marex at denx.de> wrote:
>
> The NAND devices with 128 kiB erase blocks require extra 64 kiB padding
> between each SPL image. Generate U-Boot image with such a padding using
> this new target.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Chin Liang See <chin.liang.see at intel.com>
> Cc: Dalon Westergreen <dwesterg at gmail.com>
> Cc: Dinh Nguyen <dinguyen at kernel.org>
> Cc: Ley Foon Tan <ley.foon.tan at intel.com>
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>
> Cc: Tien Fong Chee <tien.fong.chee at intel.com>
> ---
>  Makefile | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/Makefile b/Makefile
> index 7485bc2594..d3038cf665 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1476,6 +1476,17 @@ cmd_socboot = cat        spl/u-boot-spl.sfp spl/u-boot-spl.sfp   \
>                         u-boot.img > $@ || rm -f $@
>  u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
>         $(call if_changed,socboot)
> +
> +quiet_cmd_socnandboot = SOCNANDBOOT $@
> +cmd_socnandboot =  dd if=/dev/zero of=spl/u-boot-spl.pad bs=64 count=1024 ; \

There's already a file 'spl/u-boot-spl-pad.bin' which is used for reserving
bss between spl binary and dtb. Could we use a more speaking name here?

Regards,
Simon

> +                  cat  spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> +                       spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> +                       spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> +                       spl/u-boot-spl.sfp spl/u-boot-spl.pad \
> +                       u-boot.img > $@ || rm -f $@ spl/u-boot-spl.pad
> +u-boot-with-nand-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE
> +       $(call if_changed,socnandboot)
> +
>  endif
>
>  ifeq ($(CONFIG_MPC85xx)$(CONFIG_OF_SEPARATE),yy)
> --
> 2.24.0.432.g9d3f5f5b63
>