[U-Boot] [PATCH v3 000/108] x86: Add initial support for apollolake

Simon Glass sjg at chromium.org
Thu Nov 21 13:51:20 UTC 2019


Hi,

On Thu, 24 Oct 2019 at 09:01, Simon Glass <sjg at chromium.org> wrote:
>
> Hi Andy,
>
> On Tue, 22 Oct 2019 at 02:15, Andy Shevchenko <andy.shevchenko at gmail.com> wrote:
> >
> > On Tue, Oct 22, 2019 at 1:55 AM Simon Glass <sjg at chromium.org> wrote:
> > > On Mon, 21 Oct 2019 at 01:55, Andy Shevchenko <andy.shevchenko at gmail.com> wrote:
> > > > On Mon, Oct 21, 2019 at 6:32 AM Simon Glass <sjg at chromium.org> wrote:
> >
> > > > Thanks for doing this!
> > > > Common comment, please do not limit LPSS drivers, including GPIO / pin
> > > > control, to be Appololake only.
> > > > They must be available for entire Intel Skylake family of SoCs
> > > > (basically all of them from Skylake, with maybe few exceptions).
> > >
> > > I have certainly put some code in intel_common, but until we have a
> > > Skylake it is a pain to figure out what is common, etc.
> > >
> > > Clearly the GPIO code can be common, but it is very easy to move it
> > > when we have the next thing.
> > >
> > > I can move GPIO and LPSS over to common, for now.
> >
> > Yes, please! That is exactly my concern.
> > Thanks!
>
> OK. Rather than resending the whole series I think I should wait for
> Bin to take a look and make this change once some of the precursor
> patches have been applied.
>
> Also what do people think about keeping the pinmux code in the GPIO
> driver? Should it be renamed / moved to pinctrl?
>
> If it would be better to resend now, let me know.

I'm getting ready to send v4 (currently at u-boot-dm/coral-working).

Before I do I am going to split out the GPIO driver into its own file
as it is currently part of pinctrl.

Regards,
Simon


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