[U-Boot] [PATCH v5 078/101] x86: Enable pinctrl in SPL and TPL

[Simon Glass]

If these phases are used we typically want to enable pinctrl in then, so
that pad setup and GPIO access are possible.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

Changes in v5:
- Correct build error in chromebook_samus_tpl

Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/Kconfig                           | 2 ++
 configs/chromebook_samus_tpl_defconfig | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/arch/Kconfig b/arch/Kconfig
index 54de91afb3..ae9c93ed7b 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -193,6 +193,7 @@ config X86
 	imply SPL_OF_LIBFDT
 	imply SPL_DRIVERS_MISC_SUPPORT
 	imply SPL_GPIO_SUPPORT
+	imply SPL_PINCTRL
 	imply SPL_LIBCOMMON_SUPPORT
 	imply SPL_LIBGENERIC_SUPPORT
 	imply SPL_SERIAL_SUPPORT
@@ -206,6 +207,7 @@ config X86
 	imply TPL_DM
 	imply TPL_DRIVERS_MISC_SUPPORT
 	imply TPL_GPIO_SUPPORT
+	imply TPL_PINCTRL
 	imply TPL_LIBCOMMON_SUPPORT
 	imply TPL_LIBGENERIC_SUPPORT
 	imply TPL_SERIAL_SUPPORT
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index fc6ceeac70..44e6d33181 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -73,6 +73,8 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_TPL_MISC=y
 CONFIG_CROS_EC=y
 CONFIG_CROS_EC_LPC=y
+# CONFIG_SPL_PINCTRL is not set
+# CONFIG_TPL_PINCTRL is not set
 CONFIG_SYS_NS16550=y
 CONFIG_SOUND=y
 CONFIG_SOUND_I8254=y
-- 
2.24.0.432.g9d3f5f5b63-goog