[U-Boot] [PATCH 2/3] mtd: rawnand: denali: Allow operation without clock driver

[Masahiro Yamada]

On Thu, Nov 21, 2019 at 6:38 AM Marek Vasut <marex at denx.de> wrote:
>
> The SoCFPGA Gen5 does not have a clock driver yet, let the NAND driver
> work without a clock driver by falling back to the default frequencies.
>
> Signed-off-by: Marek Vasut <marex at denx.de>
> Cc: Masahiro Yamada <yamada.masahiro at socionext.com>
> ---
>  drivers/mtd/nand/raw/denali_dt.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
> index 0ce81324b9..2c9e249ab6 100644
> --- a/drivers/mtd/nand/raw/denali_dt.c
> +++ b/drivers/mtd/nand/raw/denali_dt.c
> @@ -62,7 +62,6 @@ static int denali_dt_probe(struct udevice *dev)
>  {
>         struct denali_nand_info *denali = dev_get_priv(dev);
>         const struct denali_dt_data *data;
> -       struct clk clk, clk_x, clk_ecc;
>         struct resource res;
>         int ret;
>
> @@ -87,11 +86,14 @@ static int denali_dt_probe(struct udevice *dev)
>
>         denali->host = devm_ioremap(dev, res.start, resource_size(&res));
>
> +#if CONFIG_IS_ENABLED(CLK)
> +       struct clk clk, clk_x, clk_ecc;
> +
>         ret = clk_get_by_name(dev, "nand", &clk);
>         if (ret)
>                 ret = clk_get_by_index(dev, 0, &clk);
>         if (ret)
> -               return ret;
> +               clk.dev = NULL;

This line changes the 'clk' optional.
Do you need additional #if CONFIG_IS_ENABLED(CLK) ?



BTW, in Linux, clk_get() and clk_enable() are no-op
when CONFIG_HAVE_CLK is unset.

The U-Boot's clk_get() returns -ENOSYS, hence
drivers tend to be ugly.
I already stopped caring the U-Boot code, though.



>         ret = clk_get_by_name(dev, "nand_x", &clk_x);
>         if (ret)
> @@ -117,10 +119,12 @@ static int denali_dt_probe(struct udevice *dev)
>                         return ret;
>         }
>
> -       if (clk_x.dev) {
> +       if (clk.dev && clk_x.dev) {
>                 denali->clk_rate = clk_get_rate(&clk);
>                 denali->clk_x_rate = clk_get_rate(&clk_x);
> -       } else {
> +       } else
> +#endif
> +       {
>                 /*
>                  * Hardcode the clock rates for the backward compatibility.
>                  * This works for both SOCFPGA and UniPhier.
> --
> 2.24.0.432.g9d3f5f5b63
>
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--
Best Regards

Masahiro Yamada