[U-Boot] [PATCH 3/3] mtd: rawnand: denali: Do not reset the block on SoCFPGA

Masahiro Yamada yamada.masahiro at socionext.com
Tue Nov 26 09:17:56 UTC 2019


On Tue, Nov 26, 2019 at 6:10 PM Marek Vasut <marex at denx.de> wrote:
>
> On 11/26/19 10:07 AM, Masahiro Yamada wrote:
> > On Tue, Nov 26, 2019 at 6:01 PM Marek Vasut <marex at denx.de> wrote:
> >>
> >> On 11/26/19 9:46 AM, Masahiro Yamada wrote:
> >>> On Tue, Nov 26, 2019 at 5:23 PM Marek Vasut wrote:
> >>>>
> >>>> On 11/26/19 3:47 AM, Masahiro Yamada wrote:
> >>>>> On Thu, Nov 21, 2019 at 6:38 AM Marek Vasut wrote:
> >>>>>>
> >>>>>> Legacy kernel versions for SoCFPGA may not implement proper reset
> >>>>>> handling.
> >>>>>
> >>>>> What is "legacy kernel versions" ?
> >>>>
> >>>> Anything older than 5.x , which got proper reset handling, finally.
> >>>
> >>>
> >>> Really?
> >>> Could you tell the commit ID?
> >>
> >> commit 37f7453a4b7aa3e1d1608edeb500b105257ee945
> >>     ARM: dts: socfpga: update missing reset property peripherals
> >>
> >> commit 1c909b2dfe6a21de2c24dc1c1405593e40e3a88c
> >>     ARM: dts: socfpga: update more missing reset properties
> >
> >
> > These are just DT updates.
> >
> > I do not see any proper reset handling in drivers/mtd/nand/raw/denali*.c
>
> Yes, DT updates which actually wire the reset to the IP so it can be
> toggled.


I am asking where the reset _consumer_ code is.

I'd like to find where
  reset_control_get*
  reset_control_deassert()
are called for the NAND reset.



> > I am curious how the NAND reset is working in your kernel.
>
> It was not working at all until those patches were in.
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-- 
Best Regards
Masahiro Yamada


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