[U-Boot] [PATCH v2 2/2] rockchip: px30: enable spl-fifo-mode for both emmc and sdmmc on evb

Heiko Stübner heiko at sntech.de
Thu Nov 28 08:19:39 UTC 2019


Hi Patrick,

Am Donnerstag, 28. November 2019, 00:38:45 CET schrieb Patrick Wildt:
> On Tue, Nov 19, 2019 at 12:04:02PM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner <heiko.stuebner at theobroma-systems.com>
> > 
> > As part of loading trustedfirmware, the SPL is required to place portions
> > of code into the socs sram but the mmc controllers can only do dma
> > transfers into the regular memory, not sram.
> > 
> > The results of this are not directly visible in u-boot itself, but
> > manifest as security-relate cpu aborts during boot of for example Linux.
> > 
> > There were a number of attempts to solve this elegantly but so far
> > discussion is still ongoing, so to make the board at least boot correctly
> > put both mmc controllers into fifo-mode, which also circumvents the
> > issue for now.
> > 
> > Signed-off-by: Heiko Stuebner <heiko.stuebner at theobroma-systems.com>
> 
> Hi,
> 
> is this also needed on RK3399 based machines?  I have a NanoPC-T4,
> where the eMMC is on the Arasan controller and the SD card on the
> dwmmc.  So if I boot from SD card I need this as well?

I think so. That dma-to-sram issue is supposed to be present on a lot
(maybe all?) Rockchip SoCs. And I think I remember running into that
issue on rk3399 as well already in the past.

Not sure if that is limited to the dw-mmc only though or the arasan is
also affected - maybe Kever knows :-)


Heiko




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