[U-Boot] [PATCH 2/3] imx: add the i.MX8M reset controller node

Patrick Wildt patrick at blueri.se
Fri Oct 4 15:50:07 UTC 2019


On Fri, Oct 04, 2019 at 09:39:29AM -0300, Fabio Estevam wrote:
> Hi Patrick,
> 
> On Thu, Oct 3, 2019 at 11:12 AM Patrick Wildt <patrick at blueri.se> wrote:
> >
> > This patch adds the reset controller node to the i.MX8MQ SoC
> > device tree.
> >
> > Signed-off-by: Patrick Wildt <patrick at blueri.se>
> > ---
> >  arch/arm/dts/fsl-imx8mq.dtsi | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/arm/dts/fsl-imx8mq.dtsi b/arch/arm/dts/fsl-imx8mq.dtsi
> > index c35c23e293..d843b401be 100644
> > --- a/arch/arm/dts/fsl-imx8mq.dtsi
> > +++ b/arch/arm/dts/fsl-imx8mq.dtsi
> > @@ -19,6 +19,7 @@
> >  #include <dt-bindings/input/input.h>
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/pinctrl/pins-imx8mq.h>
> > +#include <dt-bindings/reset/imx8mq-reset.h>
> >  #include <dt-bindings/thermal/thermal.h>
> >
> >  / {
> > @@ -269,6 +270,12 @@
> >                 #clock-cells = <1>;
> >         };
> >
> > +       src: reset-controller at 30390000 {
> > +               compatible = "fsl,imx8mq-src", "syscon";
> > +               reg = <0x0 0x30390000 0x0 0x10000>;
> > +               #reset-cells = <1>;
> 
> This reset-controller node is already part of the upstream kernel imx8mq.dtsi.
> 
> What about syncing the U-Boot version with the one from kernel 5.3.2?
> Also, please note the dtsi name change.
> 
> Thanks

Hi Fabio,

yes, that's true.  It does make sense to sync the device trees and
do the name change.  Can the diff with the reset controller driver
(patch 1/3) be merged anyway, and I'll follow up with the DTS change?
Would be easier for me to handle the number of patches to submit.

Thank you for the review!

Best regards,
Patrick

> 
> > +       };
> > +
> >         gpc: gpc at 303a0000 {
> >                 compatible = "fsl,imx8mq-gpc", "fsl,imx7d-gpc", "syscon";
> >                 reg = <0x0 0x303a0000 0x0 0x10000>;
> > --
> > 2.23.0
> >


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