[U-Boot] [PATCH 079/126] x86: Reduce mrccache record alignment size

[Bin Meng]

Hi Simon,

On Wed, Sep 25, 2019 at 10:59 PM Simon Glass <sjg at chromium.org> wrote:
>
> At present the records are 4KB in size. This is unnecessarily large when
> the SPI-flash erase size is 256 bytes. Reduce it so it will be more

But this will break for SPI-flash erase size that is not 256 bytes?

> efficient with Apollolake's 24-byte variable-data record.
>
> Signed-off-by: Simon Glass <sjg at chromium.org>
> ---
>
>  arch/x86/include/asm/mrccache.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>

Regards,
Bin