[U-Boot] Pull request: u-boot-riscv/master

[Tom Rini]

On Tue, Sep 03, 2019 at 10:15:42AM +0800, uboot at andestech.com wrote:

> Hi Tom,
> 
> Please pull some riscv updates:
> 
> - Skip unavailable hart in the get_count().
> - fu540 set serial env from otp.
> - fu540 add mmc0 as a boot target device.
> - Update fix_rela_dyn and add absolute reloc addend.
> - Andestech PLIC driver will skip unavailable hart.
> - Support Andestech V5L2 cache driver.
> 
> https://travis-ci.org/rickchen36/u-boot-riscv/builds/579707002
> 
> Thanks
> Rick
> 
> 
> The following changes since commit d22c8be964a870f59d2fdab6c67cefa0c4799364:
> 
>   Merge branch 'master' of git://git.denx.de/u-boot-sh (2019-09-01 13:33:12 -0400)
> 
> are available in the Git repository at:
> 
>   git at gitlab.denx.de:u-boot/custodians/u-boot-riscv.git
> 
> for you to fetch changes up to 61ce84b2cf1a6672c8e402ce8174554b25629692:
> 
>   riscv: cache: use CCTL to flush d-cache (2019-09-03 09:31:03 +0800)
> 

Applied to u-boot/master, thanks!


-- 
Tom
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