[PATCH v6 12/17] riscv: sifive: fu540: add SPL configuration

Bin Meng bmeng.cn at gmail.com
Mon Apr 20 11:35:02 CEST 2020


Hi Pragnesh,

On Mon, Mar 30, 2020 at 1:07 AM Pragnesh Patel
<pragnesh.patel at sifive.com> wrote:
>
> Add a support for SPL which will boot from L2 LIM (0x0800_0000) and
> then boot U-boot FIT image including OpenSBI FW_DYNAMIC firmware

nits: U-Boot

> and U-Boot proper images from 1st partition of MMC boot devices.
>
> SPL related code is leverage from FSBL

leveraged

> (https://github.com/sifive/freedom-u540-c000-bootloader.git)
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel at sifive.com>
> ---
>  arch/riscv/Makefile                        |  1 +
>  arch/riscv/fu540/Makefile                  | 11 ++++
>  arch/riscv/fu540/spl.c                     | 30 +++++++++
>  arch/riscv/include/asm/arch-generic/gpio.h |  3 +
>  arch/riscv/include/asm/arch-generic/spl.h  | 14 +++++
>  board/sifive/fu540/Kconfig                 |  8 +++
>  board/sifive/fu540/Makefile                |  4 ++
>  board/sifive/fu540/fu540.c                 | 24 ++++++++
>  board/sifive/fu540/spl.c                   | 72 ++++++++++++++++++++++
>  include/configs/sifive-fu540.h             | 18 ++++++
>  10 files changed, 185 insertions(+)
>  create mode 100644 arch/riscv/fu540/Makefile
>  create mode 100644 arch/riscv/fu540/spl.c
>  create mode 100644 arch/riscv/include/asm/arch-generic/spl.h
>  create mode 100644 board/sifive/fu540/spl.c
>
> diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile
> index 0b80eb8d86..599ae8d77d 100644
> --- a/arch/riscv/Makefile
> +++ b/arch/riscv/Makefile
> @@ -35,3 +35,4 @@ head-y := arch/riscv/cpu/start.o
>  libs-y += arch/riscv/cpu/
>  libs-y += arch/riscv/cpu/$(CPU)/
>  libs-y += arch/riscv/lib/
> +libs-y += arch/riscv/fu540/
> diff --git a/arch/riscv/fu540/Makefile b/arch/riscv/fu540/Makefile
> new file mode 100644
> index 0000000000..e3b40ae7d4
> --- /dev/null
> +++ b/arch/riscv/fu540/Makefile
> @@ -0,0 +1,11 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +# Copyright (C) 2020 SiFive, Inc
> +# Pragnesh Patel <pragnesh.patel at sifive.com>
> +
> +ifeq ($(CONFIG_SPL_BUILD),y)
> +obj-$(CONFIG_TARGET_SIFIVE_FU540) += spl.o
> +else
> +# necessary to create built-in.o
> +obj- += __dummy__.o
> +endif
> diff --git a/arch/riscv/fu540/spl.c b/arch/riscv/fu540/spl.c
> new file mode 100644
> index 0000000000..3d9dea5e30
> --- /dev/null
> +++ b/arch/riscv/fu540/spl.c

This should be put arch/riscv/cpu/fu540 instead

> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2020 SiFive, Inc
> + * Pragnesh Patel <pragnesh.patel at sifive.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +
> +int soc_spl_init(void)
> +{
> +       int ret;
> +       struct udevice *dev;
> +
> +       /* PRCI init */
> +       ret = uclass_get_device(UCLASS_CLK, 0, &dev);
> +       if (ret) {
> +               debug("Clock init failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       /* DDR init */
> +       ret = uclass_get_device(UCLASS_RAM, 0, &dev);
> +       if (ret) {
> +               debug("DRAM init failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       return 0;
> +}
> diff --git a/arch/riscv/include/asm/arch-generic/gpio.h b/arch/riscv/include/asm/arch-generic/gpio.h
> index dfcb753051..0d16c59ca6 100644
> --- a/arch/riscv/include/asm/arch-generic/gpio.h
> +++ b/arch/riscv/include/asm/arch-generic/gpio.h
> @@ -32,4 +32,7 @@ struct sifive_gpio_platdata {
>         void *base;     /* address of registers in physical memory */
>  };
>
> +#define SIFIVE_GENERIC_GPIO_NR(port, index) \
> +               (((port) * NR_GPIOS) + ((index) & (NR_GPIOS - 1)))
> +
>  #endif /* _GPIO_SIFIVE_H */
> diff --git a/arch/riscv/include/asm/arch-generic/spl.h b/arch/riscv/include/asm/arch-generic/spl.h
> new file mode 100644
> index 0000000000..0c188be747
> --- /dev/null
> +++ b/arch/riscv/include/asm/arch-generic/spl.h

This should be arch/riscv/include/asm/arch-fu540/spl.h

> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Copyright (C) 2020 SiFive, Inc.
> + *
> + * Authors:
> + *   Pragnesh Patel <pragnesh.patel at sifve.com>
> + */
> +
> +#ifndef _SPL_SIFIVE_H
> +#define _SPL_SIFIVE_H
> +
> +int soc_spl_init(void);
> +
> +#endif /* _SPL_SIFIVE_H */
> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
> index 900197bbb2..ebe3472f9a 100644
> --- a/board/sifive/fu540/Kconfig
> +++ b/board/sifive/fu540/Kconfig
> @@ -13,12 +13,20 @@ config SYS_CONFIG_NAME
>         default "sifive-fu540"
>
>  config SYS_TEXT_BASE
> +       default 0x80200000 if SPL
>         default 0x80000000 if !RISCV_SMODE
>         default 0x80200000 if RISCV_SMODE
>
> +config SPL_TEXT_BASE
> +       default 0x08000000
> +
> +config SPL_OPENSBI_LOAD_ADDR
> +       default 0x80000000
> +
>  config BOARD_SPECIFIC_OPTIONS # dummy
>         def_bool y
>         select GENERIC_RISCV
> +       select SUPPORT_SPL
>         imply CMD_DHCP
>         imply CMD_EXT2
>         imply CMD_EXT4
> diff --git a/board/sifive/fu540/Makefile b/board/sifive/fu540/Makefile
> index 6e1862c475..b05e2f5807 100644
> --- a/board/sifive/fu540/Makefile
> +++ b/board/sifive/fu540/Makefile
> @@ -3,3 +3,7 @@
>  # Copyright (c) 2019 Western Digital Corporation or its affiliates.
>
>  obj-y  += fu540.o
> +
> +ifdef CONFIG_SPL_BUILD
> +obj-y += spl.o
> +endif
> diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
> index 540638c919..d05529a86b 100644
> --- a/board/sifive/fu540/fu540.c
> +++ b/board/sifive/fu540/fu540.c
> @@ -11,6 +11,7 @@
>  #include <linux/delay.h>
>  #include <linux/io.h>
>  #include <misc.h>
> +#include <spl.h>
>
>  /*
>   * This define is a value used for error/unknown serial.
> @@ -114,3 +115,26 @@ int board_init(void)
>
>         return 0;
>  }
> +
> +#ifdef CONFIG_SPL
> +void board_boot_order(u32 *spl_boot_list)
> +{
> +       u8 i;
> +       u32 boot_devices[] = {
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> +               BOOT_DEVICE_MMC1,
> +#endif
> +       };
> +
> +       for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
> +               spl_boot_list[i] = boot_devices[i];
> +}
> +#endif
> +
> +#ifdef CONFIG_SPL_LOAD_FIT
> +int board_fit_config_name_match(const char *name)
> +{
> +       /* boot using first FIT config */
> +       return 0;
> +}
> +#endif
> diff --git a/board/sifive/fu540/spl.c b/board/sifive/fu540/spl.c
> new file mode 100644
> index 0000000000..c0bf7f4d81
> --- /dev/null
> +++ b/board/sifive/fu540/spl.c
> @@ -0,0 +1,72 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2019 SiFive, Inc
> + *
> + * Authors:
> + *   Pragnesh Patel <pragnesh.patel at sifive.com>
> + */
> +
> +#include <common.h>
> +#include <spl.h>
> +#include <misc.h>
> +#include <asm/gpio.h>
> +#include <asm/arch/gpio.h>
> +#include <asm/arch/spl.h>
> +
> +#define GEM_PHY_RESET  SIFIVE_GENERIC_GPIO_NR(0, 12)
> +
> +int init_clk_and_ddr(void)
> +{
> +       int ret;
> +
> +       ret = soc_spl_init();
> +       if (ret) {
> +               debug("FU540 SPL init failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       /*
> +        * GEMGXL init VSC8541 PHY reset sequence;
> +        * leave pull-down active for 2ms
> +        */
> +       udelay(2000);
> +       ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
> +       if (ret) {
> +               debug("gem_phy_reset gpio request failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       /* Set GPIO 12 (PHY NRESET) */
> +       ret = gpio_direction_output(GEM_PHY_RESET, 1);
> +       if (ret) {
> +               debug("gem_phy_reset gpio direction set failed: %d\n", ret);
> +               return ret;
> +       }
> +
> +       udelay(1);
> +
> +       /* Reset PHY again to enter unmanaged mode */
> +       gpio_set_value(GEM_PHY_RESET, 0);
> +       udelay(1);
> +       gpio_set_value(GEM_PHY_RESET, 1);
> +       mdelay(15);
> +
> +       return 0;
> +}
> +
> +void board_init_f(ulong dummy)
> +{
> +       int ret;
> +
> +       ret = spl_early_init();
> +       if (ret)
> +               panic("spl_early_init() failed: %d\n", ret);
> +
> +       arch_cpu_init_dm();
> +
> +       ret = init_clk_and_ddr();
> +       if (ret)
> +               panic("init_clk_and_ddr() failed: %d\n", ret);
> +
> +       preloader_console_init();
> +}
> diff --git a/include/configs/sifive-fu540.h b/include/configs/sifive-fu540.h
> index 2756ed5a77..ef3ae9b650 100644
> --- a/include/configs/sifive-fu540.h
> +++ b/include/configs/sifive-fu540.h
> @@ -11,6 +11,22 @@
>
>  #include <linux/sizes.h>
>
> +#ifdef CONFIG_SPL
> +
> +#define CONFIG_SPL_MAX_SIZE            0x00100000
> +#define CONFIG_SPL_BSS_START_ADDR      0x85000000
> +#define CONFIG_SPL_BSS_MAX_SIZE                0x00100000
> +#define CONFIG_SYS_SPL_MALLOC_START    (CONFIG_SPL_BSS_START_ADDR + \
> +                                        CONFIG_SPL_BSS_MAX_SIZE)
> +#define CONFIG_SYS_SPL_MALLOC_SIZE     0x00100000
> +
> +#define CONFIG_SPL_LOAD_FIT_ADDRESS    0x84000000
> +
> +#define CONFIG_SPL_STACK       (0x08000000 + 0x001D0000 - \
> +                                GENERATED_GBL_DATA_SIZE)
> +
> +#endif
> +
>  #define CONFIG_SYS_SDRAM_BASE          0x80000000
>  #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_SDRAM_BASE + SZ_2M)
>
> @@ -24,6 +40,7 @@
>
>  /* Environment options */
>
> +#ifndef CONFIG_SPL_BUILD
>  #define BOOT_TARGET_DEVICES(func) \
>         func(MMC, mmc, 0) \
>         func(DHCP, dhcp, na)
> @@ -43,5 +60,6 @@
>  #define CONFIG_PREBOOT \
>         "setenv fdt_addr ${fdtcontroladdr};" \
>         "fdt addr ${fdtcontroladdr};"
> +#endif
>
>  #endif /* __CONFIG_H */
> --

Regards,
Bin


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