[PATCH 03/12] ARM: dts: add QorIQ DPAA 1 FMan v3 to LS1043ARDB

[Madalin Bucur]

Introduce the QorIQ DPAA 1 Frame Manager nodes in the LS1043ARDB
device tree. The device tree fragments are copied over with little
modification from the Linux kernel source code.

Signed-off-by: Madalin Bucur <madalin.bucur at oss.nxp.com>
---
 arch/arm/dts/fsl-ls1043a-rdb.dts | 81 ++++++++++++++++++++++++++++++++++++++++
 arch/arm/dts/fsl-ls1043a.dtsi    |  2 +-
 2 files changed, 82 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts
index 721b158..6e4ea5b 100644
--- a/arch/arm/dts/fsl-ls1043a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1043a-rdb.dts
@@ -3,6 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  *
  * Copyright (C) 2015, Freescale Semiconductor
+ * Copyright 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu at freescale.com>
  */
@@ -98,3 +99,83 @@
 &duart1 {
 	status = "okay";
 };
+
+#include "fsl-ls1043-post.dtsi"
+
+&fman0 {
+	ethernet at e0000 {
+		phy-handle = <&qsgmii_phy1>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet at e2000 {
+		phy-handle = <&qsgmii_phy2>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet at e4000 {
+		phy-handle = <&rgmii_phy1>;
+		phy-connection-type = "rgmii-txid";
+		status = "okay";
+	};
+
+	ethernet at e6000 {
+		phy-handle = <&rgmii_phy2>;
+		phy-connection-type = "rgmii-txid";
+		status = "okay";
+	};
+
+	ethernet at e8000 {
+		phy-handle = <&qsgmii_phy3>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet at ea000 {
+		phy-handle = <&qsgmii_phy4>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet at f0000 { /* 10GEC1 */
+		phy-handle = <&aqr105_phy>;
+		phy-connection-type = "xgmii";
+		status = "okay";
+	};
+
+	mdio at fc000 {
+		rgmii_phy1: ethernet-phy at 1 {
+			reg = <0x1>;
+		};
+
+		rgmii_phy2: ethernet-phy at 2 {
+			reg = <0x2>;
+		};
+
+		qsgmii_phy1: ethernet-phy at 4 {
+			reg = <0x4>;
+		};
+
+		qsgmii_phy2: ethernet-phy at 5 {
+			reg = <0x5>;
+		};
+
+		qsgmii_phy3: ethernet-phy at 6 {
+			reg = <0x6>;
+		};
+
+		qsgmii_phy4: ethernet-phy at 7 {
+			reg = <0x7>;
+		};
+	};
+
+	mdio at fd000 {
+		aqr105_phy: ethernet-phy at 1 {
+			compatible = "ethernet-phy-ieee802.3-c45";
+			interrupts = <0 132 4>;
+			reg = <0x1>;
+		};
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index b159c3c..0a959f0 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -31,7 +31,7 @@
 		interrupts = <1 9 0xf08>;
 	};
 
-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
-- 
2.1.0