[PATCH v6 0/5] usb: host: dwc2: use driver model for PHY and CLOCK

[Marek Vasut]

On 4/24/20 3:42 PM, Patrick DELAUNAY wrote:
> Dear Marek,
> 
>> From: Patrick DELAUNAY <patrick.delaunay at st.com>
>> Sent: mardi 10 mars 2020 11:09
>>
>>
>> In this serie I update the DWC2 host driver to use the device tree information and
>> the associated PHY and CLOCK drivers when they are availables.
>>
>> V6 is minor update of the first patch of the serie; I update some clk stub to return
>> success after Simon Goldschmidt remarks on V5:
>> http://patchwork.ozlabs.org/project/uboot/list/?series=162791
>>
>> I test the V4 of this serie on stm32mp157c-ev1 board, with PHY and CLK support
>> (V5 was a minor update).
>>
>> The U-CLASS are provided by:
>> - PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
>> - CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
>> - RESET by RCC reset driver = drivers/reset/stm32-reset.c
>>
>> And I activate the configuration
>> +CONFIG_USB_DWC2=y
>>
>> PS: it is not the default configuration to avoid conflict with gadget
>>     driver
>>
>> To solve a binding issue, I also deactivate the gadget support:
>> by default only one driver is bound to the usbotg_hs node with "snps,dwc2"
>> compatible, and today it is the device one (the first in the driver list).
>>
>> I also need to deactivate hnp-srp support with:
>>
>> &usbotg_hs {
>> 	/* need to disable ONLY for HOST support */
>> 	hnp-srp-disable;
>> };
>>
>> WARNING: OTG with device or host support is not correctly handle by DWC2
>>          driver (see example for dynamic OTG role in DWC3 driver).
>>
>> The tests executed on the stm32mp157c-ev1 target:
>>
>> STM32MP> usb start
>> starting USB...
>> Bus usb-otg at 49000000: USB DWC2
>> Bus usbh-ehci at 5800d000: USB EHCI 1.00
>> scanning bus usb-otg at 49000000 for devices... 2 USB Device(s) found scanning
>> bus usbh-ehci at 5800d000 for devices... 3 USB Device(s) found
>>        scanning usb for storage devices... 2 Storage Device(s) found
>> STM32MP> usb tree
>> USB device tree:
>>   1  Hub (480 Mb/s, 0mA)
>>   |   U-Boot Root Hub
>>   |
>>   +-2  Mass Storage (480 Mb/s, 300mA)
>>        Verbatim STORE N GO 070731C8ACD7EE97
>>
>>   1  Hub (480 Mb/s, 0mA)
>>   |  u-boot EHCI Host Controller
>>   |
>>   +-2  Hub (480 Mb/s, 2mA)
>>
>> STM32MP> ls usb 0
>> <DIR>       4096 .
>> <DIR>       4096 ..
>> <DIR>      16384 lost+found
>> <DIR>       4096 record
>>          1490212 xipImage
>>         21058006 vmlinux
>>
>> STM32MP> load usb 0 0xC0000000 vmlinux
>> 21058006 bytes read in 10851 ms (1.9 MiB/s)
>>
>>
>> Changes in v6:
>> - return success in stub for clk_free/clk_enable/clk_disable/
>>   clk_enable_bulk/clk_disable_bulk
>>
>> Changes in v5:
>> - use ERR_PTR in clk_get_parent()
>> - force bulk->count = 0 in clk_get_bulk to avoid issue
>>   for next call of clk_enable_bulk / clk_enable_bulk
>> - update commit message
>> - inverse logic for -ENOENT test on generic_phy_get_by_index result
>> - Add some comments
>>
>> Changes in v4:
>> - Add stub for all functions using 'struct clk' or 'struct clk_bulk'
>>   after remarks on v3
>>
>> Changes in v3:
>> - Add stub for clk_disable_bulk
>>
>> Changes in v2:
>> - update dev_err
>> - update commit message
>> - change dev_err to dev_dbg for PHY function call
>> - treat dwc2_shutdown_phy error
>> - add clk_disable_bulk in dwc2_usb_remove
>>
>> Patrick Delaunay (5):
>>   dm: clk: add stub when CONFIG_CLK is deactivated
>>   usb: host: dwc2: add phy support
>>   usb: host: dwc2: add clk support
>>   usb: host: dwc2: force reset assert
>>   usb: host: dwc2: add trace to have clean usb start
>>
>>  drivers/usb/host/dwc2.c | 100 ++++++++++++++++++++++++++++++++++++++-
>>  include/clk.h           | 102 +++++++++++++++++++++++++++++++++++-----
>>  2 files changed, 188 insertions(+), 14 deletions(-)
>>
>> --
>> 2.17.1
> 
> Gentle reminder.

Rebase and resend please.