[PATCH] cache: l2x0: Fix write to incorrect shared-override bit

[Tom Rini]

On Fri, Apr 17, 2020 at 02:45:35PM +0800, Ley Foon Tan wrote:

> The existing code write bit-0 for shared attribute override enable bit.
> It should be bit-22 based on cache controller specification [1].
> 
> [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3p2_trm.pdf
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>

Applied to u-boot/master, thanks!

-- 
Tom
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