reset on mpc83xx

Christophe Leroy christophe.leroy at
Thu Apr 30 17:03:44 CEST 2020

Le 30/04/2020 à 16:44, Rasmus Villemoes a écrit :
> Hi,
> I'm wondering why the sysreset_mpc83xx driver (as well as the similar
> code in arch/powerpc/cpu/mpc83xx/cpu.c) removes the MSR_IR and MSR_DR
> bits from MSR.
> On my mpc8309, that seems to simply make the board hang right after
> writing the new MSR value - i.e., it never gets to write the magic value
> 0x52535445 to RPR and of course not to then actually do the reset.
> Doing
> -       msr &= ~(MSR_EE | MSR_IR | MSR_DR);
> +       msr &= ~(MSR_EE);
> (whether using the sysreset driver or the cpu.c code) makes the board
> reset as expected.
> The linux kernel's mpc83xx_restart() doesn't seem to remove those bits,
> and rebooting from linux works as expected - it does local_irq_disable()
> which amounts to clearing the EE bit.
> But since the arch/powerpc/cpu/mpc83xx/cpu.c code in U-Boot has been
> there forever, I assume I'm missing something fundamental.
> [The board happens to have an external watchdog circuit that performs a
> power cycle after a while, but there are cases, e.g. bootstrapping,
> where that circuitry is disabled, and moreover, we'd like to be able to
> make use of the reset status register to distinguish a reset from a cold
> boot].

On my mpc8321 it works.

However I agree it looks odd.

I think it works by chance because we have a 1:1 MMU mapping, but if you 
have a difference mapping I can't see how you can disable Instruction 
MMU without going through a write into SRR0/SRR1 and an rfi.


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