reset on mpc83xx

[Rasmus Villemoes]

On 30/04/2020 17.03, Christophe Leroy wrote:
> 
> 
> Le 30/04/2020 à 16:44, Rasmus Villemoes a écrit :
>> Hi,
>>
>> I'm wondering why the sysreset_mpc83xx driver (as well as the similar
>> code in arch/powerpc/cpu/mpc83xx/cpu.c) removes the MSR_IR and MSR_DR
>> bits from MSR.
>>
[snip]
>>
>> But since the arch/powerpc/cpu/mpc83xx/cpu.c code in U-Boot has been
>> there forever, I assume I'm missing something fundamental.
> 
> On my mpc8321 it works.
> 
> However I agree it looks odd.
> 
> I think it works by chance because we have a 1:1 MMU mapping, but if you
> have a difference mapping I can't see how you can disable Instruction
> MMU without going through a write into SRR0/SRR1 and an rfi.

OK, thanks. Can you test if it still works if you change the code to not
clear the MSR_IR and MSR_DR bits? (I expect it will, since I assume
you'd have noticed if reboot from linux didn't work).

I'm actually wondering what the core does after the MSR_IR bit gets
cleared. If address translation is disabled, what instruction does it
then do immediately after the mtmsr? I mean, the pc has some value, but
how does that get interpreted without MSR_IR set?

And yes, the (unused, it seems) disable_addr_trans routine in start.S
does seem to be somewhat more complicated than a simple RMW of MSR,
suggesting that if disabling address translation was really needed
before reset, it should be done using that rather than by just clearing
the bits directly.

Rasmus