[PATCH v2 13/17] x86: Add support for ACPI general-purpose events
Simon Glass
sjg at chromium.org
Wed Feb 5 14:50:38 CET 2020
Hi Bin,
On Tue, 4 Feb 2020 at 02:08, Bin Meng <bmeng.cn at gmail.com> wrote:
>
> On Tue, Feb 4, 2020 at 8:20 AM Simon Glass <sjg at chromium.org> wrote:
> >
> > ACPI GPEs are used to signal interrupts from peripherals that are accessed
> > via ACPI. In U-Boot these are modelled as interrupts using a separate
> > interrupt controller. Configuration is via the device tree.
> >
> > Add a simple driver for this.
> >
> > Signed-off-by: Simon Glass <sjg at chromium.org>
> > ---
> >
> > Changes in v2: None
> >
> > arch/x86/Kconfig | 33 +++++++
> > arch/x86/cpu/Makefile | 1 +
> > arch/x86/cpu/acpi_gpe.c | 85 +++++++++++++++++++
> > .../interrupt-controller/intel,acpi-gpe.txt | 30 +++++++
> > 4 files changed, 149 insertions(+)
> > create mode 100644 arch/x86/cpu/acpi_gpe.c
> > create mode 100644 doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
> >
[..]
> > diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
> > new file mode 100644
> > index 0000000000..d9252bf29f
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
> > @@ -0,0 +1,30 @@
> > +* Intel Advanced Configuration and Power Interface General Purpose Events
> > +
> > +This describes an interrupt controller which provides access to GPEs supported
> > +by the SoC.
> > +
> > +Required properties:
> > +
> > +- compatible : "intel,acpi-gpe"
> > +- interrupt-controller : Identifies the node as an interrupt controller
> > +- #interrupt-cells : The number of cells to define the interrupts. Must be 2:
> > + cell 0: interrupt number (normally >=32 since GPEs below that are reserved)
> > + cell 1: 0 (flags, but none are currently defined)
>
> I wonder why we have to use #interrupt-cells = <2> since cell 1 is always zero
I am thinking that we will need a lot of flags eventually and want to
avoid needing to change the binding later.
>
> > +- reg : The register bank for the controller (set this to the ACPI base).
> > +
> > +Example:
> > +
> > + general-purpose-events {
> > + reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
> > + compatible = "intel,acpi-gpe";
> > + interrupt-controller;
> > + #interrupt-cells = <2>;
> > + };
> > +
> > + ...
> > + tpm at 50 {
> > + reg = <0x50>;
> > + compatible = "google,cr50";
> > + ready-gpio = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
> > + interrupts-extended = <&acpi_gpe 0x3c 0>;
> > + };
> > --
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
Regards,
Simon
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