Zybo Z7 board - fix SPL uart init bitrate

[Luis Araneda]

Hi Michal,

On Tue, Jan 14, 2020 at 5:48 AM Michal Simek <monstr at monstr.eu> wrote:
>
> +Luis
>
> čt 9. 1. 2020 v 14:00 odesílatel Milan Obuch <u-boot at dino.sk> napsal:
> >
> > Hi,
> >
> > Zybo Z7 board uses 100 MHz clock for UART bitrate generator, in
> > defconfig is 50 MHz listed. This error manifests itself when boot
> > starts, following is seen on console:
> > [...]
> > --- configs/zynq_zybo_z7_defconfig.orig 2020-01-09 08:16:33.744969000 +0100
> > +++ configs/zynq_zybo_z7_defconfig      2020-01-09 07:49:33.181891000 +0100
> > @@ -5,7 +5,7 @@
> >  CONFIG_SPL_STACK_R_ADDR=0x200000
> >  CONFIG_SPL=y
> >  CONFIG_DEBUG_UART_BASE=0xe0001000
> > -CONFIG_DEBUG_UART_CLOCK=50000000
> > +CONFIG_DEBUG_UART_CLOCK=100000000
> >  CONFIG_DEBUG_UART=y
> >  CONFIG_DISTRO_DEFAULTS=y
> >  CONFIG_SYS_CUSTOM_LDSCRIPT=y
>
> Luis: Can you please check?

I successfully tested the patch on a Zybo Z7-20 board.
As the description said, the text "Debug uart enabled" is now displayed.

Once the commit is in shape to be merged, feel free to add my Tested-by tag.

Tested-by: Luis Araneda <luaraneda at gmail.com>

Please ping me if the author does not want to send a proper git patch
so I can send it instead. I don't want this work to be lost.

Regards,
Luis Araneda.