[PATCH 2/5] freescale: ls1046aqds: enable secure system counter

[Biwen Li]

From: Biwen Li <biwen.li at nxp.com>

Enable secure system counter in board_early_init_f for udelay()
to fix a bug that always return 0 by timer_read_counter()
when boot from qspi(No TFA)

Signed-off-by: Biwen Li <biwen.li at nxp.com>
---
 board/freescale/ls1046aqds/ls1046aqds.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index cabd7ee..c6f79c9 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2016 Freescale Semiconductor, Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 #include <common.h>
@@ -322,6 +322,7 @@ int i2c_multiplexer_select_vid_channel(u8 channel)
 
 int board_early_init_f(void)
 {
+	u32 __iomem *cntcr = (u32 *)CONFIG_SYS_FSL_TIMER_ADDR;
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 	u32 usb_pwrfault;
@@ -330,6 +331,11 @@ int board_early_init_f(void)
 	u8 uart;
 #endif
 
+	/*
+	 * Enable secure system counter for timer
+	 */
+	out_le32(cntcr, 0x1);
+
 #ifdef CONFIG_SYS_I2C
 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 	i2c_early_init_f();
-- 
2.7.4