[PATCH v3 07/15] dt-bindings: memory: ns3: update GIC LPI address

Rayagonda Kokatanur rayagonda.kokatanur at broadcom.com
Sat Jul 4 20:50:12 CEST 2020


Hi Simon,

On Sat, Jul 4, 2020 at 1:20 PM Rayagonda Kokatanur
<rayagonda.kokatanur at broadcom.com> wrote:
>
> Hi Simon,
>
> On Fri, Jun 26, 2020 at 6:42 AM Simon Glass <sjg at chromium.org> wrote:
> >
> > On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
> > <rayagonda.kokatanur at broadcom.com> wrote:
> > >
> > > Update NS3 GIC LPI address.
> > >
> > > Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> > > ---
> > >  include/dt-bindings/memory/bcm-ns3-mc.h | 3 +++
> > >  1 file changed, 3 insertions(+)
> > >
> >
> > Reviewed-by: Simon Glass <sjg at chromium.org>
> >
> > Lower case hex
> >
> > Can these be in the device tree and use a driver, like syscon maybe?
>
> I tried using a device tree and syscon driver class (UCLASS_SYSCON)
> but I am facing an issue ie
>
> When I call syscon_get_regmap() to get regmap, I am getting zero for
> regmap->ranges[0].start  and regmap->ranges[0].size.
> I am passing the parent node udevice pointer to syscon_get_regmap().
>
> I could see syscon_pre_probe() is not getting called during uboot
> booting, hence regmap is not initialized.
>
> Following are my code changes:
>
> //dt changes:
> +       gic_lpi: syscon at 0x8ad70000 {
> +               compatible = "syscon";
> +               reg = <0x0 0x8ad70000 0x0 0x90000>;
> +               status = "okay";
> +       };
> +
> +       scr {
> +               compatible = "simple-bus";
> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               ranges = <0x0 0x0 0x61000000 0x05000000>;
> +
> +               gic: interrupt-controller at 2c00000 {
> +                       compatible = "arm,gic-v3";
> +                       #interrupt-cells = <3>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +                       ranges;
> +                       interrupt-controller;
> +                       reg = <0x02c00000 0x010000>, /* GICD */
> +                             <0x02e00000 0x600000>; /* GICR */
> +                       regmap = <&gic_lpi>;
> +                       status = "okay";
> +               };
> +       };
> +
>
> //driver changes
> +static int gic_v3_its_get_gic_addr(struct gic_v3_its_priv *priv)
> +{
> +       struct udevice *dev;
> +       struct regmap *regmap;
> +       fdt_addr_t addr;
> +       int ret;
> +
> +       ret = uclass_first_device_err(UCLASS_IRQ, &dev);
> +       if (ret && ret != -ENODEV) {
> +               pr_err("%s: Canont find irq device\n", __func__);
> +               return ret;
> +       }
> +
> +       addr = dev_read_addr_index(dev, 0);
> +       if (addr == FDT_ADDR_T_NONE) {
> +               pr_err("%s: Failed to get GICD address\n", __func__);
> +               return -EINVAL;
> +       }
> +       priv->gicd_base = addr;
> +
> +       regmap = syscon_get_regmap(dev);
> +       if (!regmap) {
> +               pr_err("%s: ** unable to find gic-lpi device\n", __func__);
> +               return -ENODEV;
> +       }
> +
> +       priv->lpi_base = regmap->ranges[0].start;
> +
> +       return 0;
> +}
>
> //defconfig changes
>  CONFIG_DM=y
> +CONFIG_REGMAP=y
> +CONFIG_SYSCON=y
>  CONFIG_DM_GPIO=y
>
> If I call uclass_first_device_err(UCLASS_SYSCON, &dev) before
> syscon_get_regmap(dev) then it works.
> Do I need to explicitly call uclass_first_device_err(UCLASS_SYSCON, &dev).
>
> Please let me know.

I used uclass_get_device_by_driver() api and it's working.
Please ignore the above question.

Thank you,
Rayagonda

>
>
> Best regards,
> Rayagonda
>
> >
> >
> > > diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
> > > index b4f78584a5..d6e7717ba2 100644
> > > --- a/include/dt-bindings/memory/bcm-ns3-mc.h
> > > +++ b/include/dt-bindings/memory/bcm-ns3-mc.h
> > > @@ -31,4 +31,7 @@
> > >  #define BCM_NS3_MEM_CRMU_PT_START  0x880000000
> > >  #define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
> > >
> > > +#define BCM_NS3_GIC_LPI_BASE      0x8AD70000
> > > +#define BCM_NS3_GIC_LPI_SIZE      0x90000
> > > +
> > >  #endif
> > > --
> > > 2.17.1
> > >


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