[PATCH v3 08/15] board: ns3: program GIC LPI tables

Rayagonda Kokatanur rayagonda.kokatanur at broadcom.com
Sun Jul 5 20:14:39 CEST 2020


Hi Simon,

On Fri, Jun 26, 2020 at 6:42 AM Simon Glass <sjg at chromium.org> wrote:
>
> Hi Rayagonda,
>
> On Wed, 10 Jun 2020 at 04:42, Rayagonda Kokatanur
> <rayagonda.kokatanur at broadcom.com> wrote:
> >
> > U-boot programs the GIC LPI configuration tables and enables
> > the LPI table.
> >
> > Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty at broadcom.com>
> > Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur at broadcom.com>
> > ---
> >  board/broadcom/bcmns3/ns3.c | 12 ++++++++++++
> >  include/configs/bcm_ns3.h   |  6 ++++++
> >  2 files changed, 18 insertions(+)
> >
> > diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
> > index 1221f26ddc..d4f374a7c6 100644
> > --- a/board/broadcom/bcmns3/ns3.c
> > +++ b/board/broadcom/bcmns3/ns3.c
> > @@ -6,9 +6,12 @@
> >
> >  #include <common.h>
> >  #include <asm/io.h>
> > +#include <asm/gic.h>
> > +#include <asm/gic-v3.h>
> >  #include <asm/system.h>
> >  #include <asm/armv8/mmu.h>
> >  #include <asm/arch-bcmns3/bl33_info.h>
> > +#include <dt-bindings/memory/bcm-ns3-mc.h>
> >
> >  static struct mm_region ns3_mem_map[] = {
> >         {
> > @@ -88,3 +91,12 @@ void reset_cpu(ulong level)
> >                 psci_system_reset();
> >         }
> >  }
> > +
> > +#ifdef CONFIG_OF_BOARD_SETUP
> > +int ft_board_setup(void *fdt, bd_t *bd)
> > +{
> > +       gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
> > +
> > +       return 0;
> > +}
> > +#endif /* CONFIG_OF_BOARD_SETUP */
> > diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
> > index 02a736456a..a17b9d51c0 100644
> > --- a/include/configs/bcm_ns3.h
> > +++ b/include/configs/bcm_ns3.h
> > @@ -37,4 +37,10 @@
> >  #define CONFIG_SYS_MAXARGS             64
> >  #define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
> >
> > +/* Generic Interrupt Controller Definitions */
> > +#define GICD_BASE                      0x63C00000
> > +#define GICR_BASE                      0x63E00000
>
> Please use device tree and a UCLASS_IRQ driver

Thank you. I will use UCLASS_IRQ.

This will require changes in arch/arm/lib/gic-v3-its.c driver ie
I will use UCLASS_IRQ in arch/arm/lib/gic-v3-its.c driver to get GICD
and GICR base address.

Hope this is okay. Please let me know.

Best regards,
Rayagonda


>
>
> > +/* Number of GIC re-distributors */
> > +#define MAX_GIC_REDISTRIBUTORS         8
> > +
> >  #endif /* __BCM_NS3_H */
> > --
> > 2.17.1
> >
>
> Regards,
> Simon


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