[PATCH 4/5] arm: dts: k3-j721e: Sync CPSW DT node from kernel

Grygorii Strashko grygorii.strashko at ti.com
Tue Jul 7 15:49:27 CEST 2020



On 06/07/2020 11:06, Vignesh Raghavendra wrote:
> Sync CPSW DT node from Kernel and move it out of -u-boot.dtsi file.
> 
> Signed-off-by: Vignesh Raghavendra <vigneshr at ti.com>
> ---
>   .../k3-j721e-common-proc-board-u-boot.dtsi    | 74 +------------------
>   arch/arm/dts/k3-j721e-mcu-wakeup.dtsi         | 74 +++++++++++++++++++
>   2 files changed, 75 insertions(+), 73 deletions(-)
> 
> diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> index 6273133303..6e748bfebb 100644
> --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
> @@ -31,20 +31,6 @@
>   		u-boot,dm-spl;
>   	};
>   
> -	mcu_conf: scm_conf at 40f00000 {
> -		compatible = "syscon", "simple-mfd";
> -		reg = <0x0 0x40f00000 0x0 0x20000>;
> -		#address-cells = <1>;
> -		#size-cells = <1>;
> -		ranges = <0x0 0x0 0x40f00000 0x20000>;
> -
> -		phy_sel: cpsw-phy-sel at 4040 {
> -			compatible = "ti,am654-cpsw-phy-sel";
> -			reg = <0x4040 0x4>;
> -			reg-names = "gmii-sel";
> -		};
> -	};
> -
>   	mcu_navss {
>   		u-boot,dm-spl;
>   
> @@ -56,65 +42,6 @@
>   			u-boot,dm-spl;
>   		};
>   	};
> -
> -	mcu_cpsw: ethernet at 046000000 {
> -		compatible = "ti,j721e-cpsw-nuss";
> -		#address-cells = <2>;
> -		#size-cells = <2>;
> -		reg = <0x0 0x46000000 0x0 0x200000>;
> -		reg-names = "cpsw_nuss";
> -		ranges;
> -		dma-coherent;
> -		clocks = <&k3_clks 18 22>;
> -		clock-names = "fck";
> -		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
> -		cpsw-phy-sel = <&phy_sel>;
> -
> -		dmas = <&mcu_udmap 0xf000>,
> -		       <&mcu_udmap 0xf001>,
> -		       <&mcu_udmap 0xf002>,
> -		       <&mcu_udmap 0xf003>,
> -		       <&mcu_udmap 0xf004>,
> -		       <&mcu_udmap 0xf005>,
> -		       <&mcu_udmap 0xf006>,
> -		       <&mcu_udmap 0xf007>,
> -		       <&mcu_udmap 0x7000>;
> -		dma-names = "tx0", "tx1", "tx2", "tx3",
> -			    "tx4", "tx5", "tx6", "tx7",
> -			    "rx";
> -
> -		ports {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> -
> -			host: host at 0 {
> -				reg = <0>;
> -				ti,label = "host";
> -			};
> -
> -			cpsw_port1: port at 1 {
> -				reg = <1>;
> -				ti,mac-only;
> -				ti,label = "port1";
> -				ti,syscon-efuse = <&mcu_conf 0x200>;
> -			};
> -		};
> -
> -		davinci_mdio: mdio {
> -			#address-cells = <1>;
> -			#size-cells = <0>;
> -			bus_freq = <1000000>;
> -		};
> -
> -		cpts {
> -			clocks = <&k3_clks 18 2>;
> -			clock-names = "cpts";
> -			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
> -			interrupt-names = "cpts";
> -			ti,cpts-ext-ts-inputs = <4>;
> -			ti,cpts-periodic-outputs = <2>;
> -		};
> -	};
>   };
>   
>   &secure_proxy_main {
> @@ -224,6 +151,7 @@
>   	reg = <0x0 0x46000000 0x0 0x200000>,
>   	      <0x0 0x40f00200 0x0 0x2>;
>   	reg-names = "cpsw_nuss", "mac_efuse";
> +	/delete-property/ ranges;
>   
>   	cpsw-phy-sel at 40f04040 {
>   		compatible = "ti,am654-cpsw-phy-sel";
> diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> index 70d5bcaa72..e6c99ab698 100644
> --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
> @@ -35,6 +35,20 @@
>   		};
>   	};
>   
> +	mcu_conf: syscon at 40f00000 {
> +		compatible = "syscon", "simple-mfd";
> +		reg = <0x0 0x40f00000 0x0 0x20000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x0 0x0 0x40f00000 0x20000>;
> +
> +		phy_gmii_sel: phy at 4040 {
> +			compatible = "ti,am654-phy-gmii-sel";
> +			reg = <0x4040 0x4>;
> +			#phy-cells = <1>;
> +		};
> +	};
> +
>   	wkup_pmx0: pinmux at 4301c000 {
>   		compatible = "pinctrl-single";
>   		/* Proxy 0 addressing */
> @@ -242,4 +256,64 @@
>   			ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
>   		};
>   	};
> +
> +	mcu_cpsw: ethernet at 46000000 {
> +		compatible = "ti,j721e-cpsw-nuss";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		reg = <0x0 0x46000000 0x0 0x200000>;
> +		reg-names = "cpsw_nuss";
> +		ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
> +		dma-coherent;
> +		clocks = <&k3_clks 18 22>;
> +		clock-names = "fck";
> +		power-domains = <&k3_pds 18 TI_SCI_PD_EXCLUSIVE>;
> +
> +		dmas = <&mcu_udmap 0xf000>,
> +		       <&mcu_udmap 0xf001>,
> +		       <&mcu_udmap 0xf002>,
> +		       <&mcu_udmap 0xf003>,
> +		       <&mcu_udmap 0xf004>,
> +		       <&mcu_udmap 0xf005>,
> +		       <&mcu_udmap 0xf006>,
> +		       <&mcu_udmap 0xf007>,
> +		       <&mcu_udmap 0x7000>;
> +		dma-names = "tx0", "tx1", "tx2", "tx3",
> +			    "tx4", "tx5", "tx6", "tx7",
> +			    "rx";
> +
> +		ethernet-ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			cpsw_port1: port at 1 {
> +				reg = <1>;
> +				ti,mac-only;
> +				label = "port1";
> +				ti,syscon-efuse = <&mcu_conf 0x200>;
> +				phys = <&phy_gmii_sel 1>;
> +			};
> +		};
> +
> +		davinci_mdio: mdio at f00 {
> +			compatible = "ti,cpsw-mdio","ti,davinci_mdio";
> +			reg = <0x0 0xf00 0x0 0x100>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			clocks = <&k3_clks 18 22>;
> +			clock-names = "fck";
> +			bus_freq = <1000000>;
> +		};
> +
> +		cpts at 3d000 {
> +			compatible = "ti,am65-cpts";
> +			reg = <0x0 0x3d000 0x0 0x400>;
> +			clocks = <&k3_clks 18 2>;
> +			clock-names = "cpts";
> +			interrupts-extended = <&gic500 GIC_SPI 858 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "cpts";
> +			ti,cpts-ext-ts-inputs = <4>;
> +			ti,cpts-periodic-outputs = <2>;
> +		};

Can we drop cpts part while here - it is not used by u-boot?


> +	};
>   };
> 

-- 
Best regards,
grygorii


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